compress/octeontx: support OCTEON TX2 SoC family
[dpdk.git] / drivers / compress / octeontx / otx_zip_pmd.c
index dd62285..dff188e 100644 (file)
@@ -85,7 +85,9 @@ zip_process_op(struct rte_comp_op *op,
                        op->status = RTE_COMP_OP_STATUS_ERROR;
        }
 
+#ifdef ZIP_DBG
        ZIP_PMD_INFO("written %d\n", zresult->s.totalbyteswritten);
+#endif
 
        /* Update op stats */
        switch (op->status) {
@@ -337,8 +339,7 @@ zip_pmd_qp_release(struct rte_compressdev *dev, uint16_t qp_id)
        if (qp != NULL) {
                zipvf_q_term(qp);
 
-               if (qp->processed_pkts)
-                       rte_ring_free(qp->processed_pkts);
+               rte_ring_free(qp->processed_pkts);
 
                rte_free(qp);
                dev->data->queue_pairs[qp_id] = NULL;
@@ -392,6 +393,8 @@ zip_pmd_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
        }
 
        name =  rte_malloc(NULL, RTE_COMPRESSDEV_NAME_MAX_LEN, 0);
+       if (name == NULL)
+               return (-ENOMEM);
        snprintf(name, RTE_COMPRESSDEV_NAME_MAX_LEN,
                 "zip_pmd_%u_qp_%u",
                 dev->data->dev_id, qp_id);
@@ -399,8 +402,10 @@ zip_pmd_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
        /* Allocate the queue pair data structure. */
        qp = rte_zmalloc_socket(name, sizeof(*qp),
                                RTE_CACHE_LINE_SIZE, socket_id);
-       if (qp == NULL)
+       if (qp == NULL) {
+               rte_free(name);
                return (-ENOMEM);
+       }
 
        qp->name = name;
 
@@ -423,10 +428,8 @@ zip_pmd_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
        return 0;
 
 qp_setup_cleanup:
-       if (qp->processed_pkts)
-               rte_ring_free(qp->processed_pkts);
-       if (qp)
-               rte_free(qp);
+       rte_ring_free(qp->processed_pkts);
+       rte_free(qp);
        return -1;
 }
 
@@ -629,6 +632,10 @@ static struct rte_pci_id pci_id_octtx_zipvf_table[] = {
                RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
                        PCI_DEVICE_ID_OCTEONTX_ZIPVF),
        },
+       {
+               RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+                       PCI_DEVICE_ID_OCTEONTX2_ZIPVF),
+       },
        {
                .device_id = 0
        },