net/mlx5: handle Rx CQE compression
[dpdk.git] / drivers / crypto / aesni_gcm / aesni_gcm_pmd.c
index 83aa272..2987ef6 100644 (file)
@@ -180,8 +180,9 @@ aesni_gcm_get_session(struct aesni_gcm_qp *qp, struct rte_crypto_sym_op *op)
 {
        struct aesni_gcm_session *sess = NULL;
 
-       if (op->type == RTE_CRYPTO_SYM_OP_WITH_SESSION) {
-               if (unlikely(op->session->type != RTE_CRYPTODEV_AESNI_GCM_PMD))
+       if (op->sess_type == RTE_CRYPTO_SYM_OP_WITH_SESSION) {
+               if (unlikely(op->session->dev_type
+                                       != RTE_CRYPTODEV_AESNI_GCM_PMD))
                        return sess;
 
                sess = (struct aesni_gcm_session *)op->session->_private;
@@ -339,7 +340,7 @@ handle_completed_gcm_crypto_op(struct aesni_gcm_qp *qp,
        post_process_gcm_crypto_op(op);
 
        /* Free session if a session-less crypto op */
-       if (op->sym->type == RTE_CRYPTO_SYM_OP_SESSIONLESS) {
+       if (op->sym->sess_type == RTE_CRYPTO_SYM_OP_SESSIONLESS) {
                rte_mempool_put(qp->sess_mp, op->sym->session);
                op->sym->session = NULL;
        }
@@ -445,6 +446,24 @@ aesni_gcm_create(const char *name,
        dev->dequeue_burst = aesni_gcm_pmd_dequeue_burst;
        dev->enqueue_burst = aesni_gcm_pmd_enqueue_burst;
 
+       dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
+                       RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+                       RTE_CRYPTODEV_FF_CPU_AESNI;
+
+       switch (vector_mode) {
+       case RTE_AESNI_GCM_SSE:
+               dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;
+               break;
+       case RTE_AESNI_GCM_AVX:
+               dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;
+               break;
+       case RTE_AESNI_GCM_AVX2:
+               dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
+               break;
+       default:
+               break;
+       }
+
        /* Set vector instructions mode supported */
        internals = dev->data->dev_private;