net/mlx5: fix event handler uninstall
[dpdk.git] / drivers / crypto / aesni_gcm / aesni_gcm_pmd.c
index abc7a6d..49ee317 100644 (file)
@@ -89,20 +89,20 @@ aesni_gcm_set_session_parameters(const struct aesni_gcm_ops *gcm_ops,
        /* Check key length and calculate GCM pre-compute. */
        switch (key_length) {
        case 16:
-               sess->key = AESNI_GCM_KEY_128;
+               sess->key = GCM_KEY_128;
                break;
        case 24:
-               sess->key = AESNI_GCM_KEY_192;
+               sess->key = GCM_KEY_192;
                break;
        case 32:
-               sess->key = AESNI_GCM_KEY_256;
+               sess->key = GCM_KEY_256;
                break;
        default:
                AESNI_GCM_LOG(ERR, "Invalid key length");
                return -EINVAL;
        }
 
-       gcm_ops[sess->key].precomp(key, &sess->gdata_key);
+       gcm_ops[sess->key].pre(key, &sess->gdata_key);
 
        /* Digest check */
        if (sess->req_digest_length > 16) {
@@ -275,7 +275,7 @@ process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_op *op,
                else
                        tag = sym_op->aead.digest.data;
 
-               qp->ops[session->key].finalize(&session->gdata_key,
+               qp->ops[session->key].finalize_enc(&session->gdata_key,
                                &qp->gdata_ctx,
                                tag,
                                session->gen_digest_length);
@@ -309,7 +309,7 @@ process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_op *op,
                }
 
                tag = qp->temp_digest;
-               qp->ops[session->key].finalize(&session->gdata_key,
+               qp->ops[session->key].finalize_dec(&session->gdata_key,
                                &qp->gdata_ctx,
                                tag,
                                session->gen_digest_length);
@@ -323,7 +323,7 @@ process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_op *op,
                        tag = qp->temp_digest;
                else
                        tag = sym_op->auth.digest.data;
-               qp->ops[session->key].finalize(&session->gdata_key,
+               qp->ops[session->key].finalize_enc(&session->gdata_key,
                                &qp->gdata_ctx,
                                tag,
                                session->gen_digest_length);
@@ -339,7 +339,7 @@ process_gcm_crypto_op(struct aesni_gcm_qp *qp, struct rte_crypto_op *op,
                 * the bytes passed.
                 */
                tag = qp->temp_digest;
-               qp->ops[session->key].finalize(&session->gdata_key,
+               qp->ops[session->key].finalize_enc(&session->gdata_key,
                                &qp->gdata_ctx,
                                tag,
                                session->gen_digest_length);
@@ -419,7 +419,8 @@ handle_completed_gcm_crypto_op(struct aesni_gcm_qp *qp,
        if (op->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {
                memset(sess, 0, sizeof(struct aesni_gcm_session));
                memset(op->sym->session, 0,
-                               rte_cryptodev_sym_get_header_session_size());
+                       rte_cryptodev_sym_get_existing_header_session_size(
+                               op->sym->session));
                rte_mempool_put(qp->sess_mp_priv, sess);
                rte_mempool_put(qp->sess_mp, op->sym->session);
                op->sym->session = NULL;
@@ -488,6 +489,7 @@ aesni_gcm_create(const char *name,
        struct rte_cryptodev *dev;
        struct aesni_gcm_private *internals;
        enum aesni_gcm_vector_mode vector_mode;
+       MB_MGR *mb_mgr;
 
        /* Check CPU for support for AES instruction set */
        if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AES)) {
@@ -502,7 +504,9 @@ aesni_gcm_create(const char *name,
        }
 
        /* Check CPU for supported vector instruction set */
-       if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
+       if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))
+               vector_mode = RTE_AESNI_GCM_AVX512;
+       else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
                vector_mode = RTE_AESNI_GCM_AVX2;
        else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX))
                vector_mode = RTE_AESNI_GCM_AVX;
@@ -522,23 +526,64 @@ aesni_gcm_create(const char *name,
                        RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
                        RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT;
 
+       mb_mgr = alloc_mb_mgr(0);
+       if (mb_mgr == NULL)
+               return -ENOMEM;
+
        switch (vector_mode) {
        case RTE_AESNI_GCM_SSE:
                dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;
+               init_mb_mgr_sse(mb_mgr);
                break;
        case RTE_AESNI_GCM_AVX:
                dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;
+               init_mb_mgr_avx(mb_mgr);
                break;
        case RTE_AESNI_GCM_AVX2:
                dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
+               init_mb_mgr_avx2(mb_mgr);
                break;
-       default:
+       case RTE_AESNI_GCM_AVX512:
+               dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
+               init_mb_mgr_avx512(mb_mgr);
                break;
+       default:
+               AESNI_GCM_LOG(ERR, "Unsupported vector mode %u\n", vector_mode);
+               goto error_exit;
        }
 
        internals = dev->data->dev_private;
 
        internals->vector_mode = vector_mode;
+       internals->mb_mgr = mb_mgr;
+
+       /* Set arch independent function pointers, based on key size */
+       internals->ops[GCM_KEY_128].enc = mb_mgr->gcm128_enc;
+       internals->ops[GCM_KEY_128].dec = mb_mgr->gcm128_dec;
+       internals->ops[GCM_KEY_128].pre = mb_mgr->gcm128_pre;
+       internals->ops[GCM_KEY_128].init = mb_mgr->gcm128_init;
+       internals->ops[GCM_KEY_128].update_enc = mb_mgr->gcm128_enc_update;
+       internals->ops[GCM_KEY_128].update_dec = mb_mgr->gcm128_dec_update;
+       internals->ops[GCM_KEY_128].finalize_enc = mb_mgr->gcm128_enc_finalize;
+       internals->ops[GCM_KEY_128].finalize_dec = mb_mgr->gcm128_dec_finalize;
+
+       internals->ops[GCM_KEY_192].enc = mb_mgr->gcm192_enc;
+       internals->ops[GCM_KEY_192].dec = mb_mgr->gcm192_dec;
+       internals->ops[GCM_KEY_192].pre = mb_mgr->gcm192_pre;
+       internals->ops[GCM_KEY_192].init = mb_mgr->gcm192_init;
+       internals->ops[GCM_KEY_192].update_enc = mb_mgr->gcm192_enc_update;
+       internals->ops[GCM_KEY_192].update_dec = mb_mgr->gcm192_dec_update;
+       internals->ops[GCM_KEY_192].finalize_enc = mb_mgr->gcm192_enc_finalize;
+       internals->ops[GCM_KEY_192].finalize_dec = mb_mgr->gcm192_dec_finalize;
+
+       internals->ops[GCM_KEY_256].enc = mb_mgr->gcm256_enc;
+       internals->ops[GCM_KEY_256].dec = mb_mgr->gcm256_dec;
+       internals->ops[GCM_KEY_256].pre = mb_mgr->gcm256_pre;
+       internals->ops[GCM_KEY_256].init = mb_mgr->gcm256_init;
+       internals->ops[GCM_KEY_256].update_enc = mb_mgr->gcm256_enc_update;
+       internals->ops[GCM_KEY_256].update_dec = mb_mgr->gcm256_dec_update;
+       internals->ops[GCM_KEY_256].finalize_enc = mb_mgr->gcm256_enc_finalize;
+       internals->ops[GCM_KEY_256].finalize_dec = mb_mgr->gcm256_dec_finalize;
 
        internals->max_nb_queue_pairs = init_params->max_nb_queue_pairs;
 
@@ -550,6 +595,14 @@ aesni_gcm_create(const char *name,
 #endif
 
        return 0;
+
+error_exit:
+       if (mb_mgr)
+               free_mb_mgr(mb_mgr);
+
+       rte_cryptodev_pmd_destroy(dev);
+
+       return -1;
 }
 
 static int
@@ -577,6 +630,7 @@ static int
 aesni_gcm_remove(struct rte_vdev_device *vdev)
 {
        struct rte_cryptodev *cryptodev;
+       struct aesni_gcm_private *internals;
        const char *name;
 
        name = rte_vdev_device_name(vdev);
@@ -587,6 +641,10 @@ aesni_gcm_remove(struct rte_vdev_device *vdev)
        if (cryptodev == NULL)
                return -ENODEV;
 
+       internals = cryptodev->data->dev_private;
+
+       free_mb_mgr(internals->mb_mgr);
+
        return rte_cryptodev_pmd_destroy(cryptodev);
 }