#include <rte_common.h>
#include <rte_crypto.h>
#include <rte_cryptodev.h>
-#include <rte_cryptodev_pmd.h>
+#include <cryptodev_pmd.h>
#include <rte_dev.h>
#include <rte_pci.h>
#include "cn9k_cryptodev.h"
#include "cn9k_cryptodev_ops.h"
+#include "cn9k_ipsec.h"
#include "cnxk_cryptodev.h"
#include "cnxk_cryptodev_capabilities.h"
+#include "cnxk_cryptodev_sec.h"
#include "roc_api.h"
static struct rte_pci_id pci_id_cpt_table[] = {
{
+ RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+ PCI_DEVID_CN9K_RVU_CPT_VF)
},
/* sentinel */
{
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
roc_cpt->pci_dev = pci_dev;
+
+ rc = cnxk_cpt_parse_devargs(dev->device->devargs, vf);
+ if (rc) {
+ plt_err("Failed to parse devargs rc=%d", rc);
+ goto pmd_destroy;
+ }
+
rc = roc_cpt_dev_init(roc_cpt);
if (rc) {
plt_err("Failed to initialize roc cpt rc=%d", rc);
plt_err("Failed to add engine group rc=%d", rc);
goto dev_fini;
}
+
+ /* Create security context */
+ rc = cnxk_crypto_sec_ctx_create(dev);
+ if (rc)
+ goto dev_fini;
}
dev->dev_ops = &cn9k_cpt_ops;
dev->driver_id = cn9k_cryptodev_driver_id;
+ dev->feature_flags = cnxk_cpt_default_ff_get();
cnxk_cpt_caps_populate(vf);
- dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
- RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
- RTE_CRYPTODEV_FF_HW_ACCELERATED |
- RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
- RTE_CRYPTODEV_FF_IN_PLACE_SGL |
- RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
- RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
- RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
- RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
- RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED |
- RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT;
-
cn9k_cpt_set_enqdeq_fns(dev);
+ cn9k_sec_ops_override();
+
+ rte_cryptodev_pmd_probing_finish(dev);
return 0;
if (dev == NULL)
return -ENODEV;
+ /* Destroy security context */
+ cnxk_crypto_sec_ctx_destroy(dev);
+
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
vf = dev->data->dev_private;
ret = roc_cpt_dev_fini(&vf->cpt);