crypto/cnxk: support inner checksum
[dpdk.git] / drivers / crypto / cnxk / cn9k_cryptodev.c
index 46ad33f..6b8cb01 100644 (file)
@@ -6,19 +6,25 @@
 #include <rte_common.h>
 #include <rte_crypto.h>
 #include <rte_cryptodev.h>
-#include <rte_cryptodev_pmd.h>
+#include <cryptodev_pmd.h>
 #include <rte_dev.h>
 #include <rte_pci.h>
 
 #include "cn9k_cryptodev.h"
 #include "cn9k_cryptodev_ops.h"
+#include "cn9k_ipsec.h"
 #include "cnxk_cryptodev.h"
+#include "cnxk_cryptodev_capabilities.h"
+#include "cnxk_cryptodev_sec.h"
+
 #include "roc_api.h"
 
 uint8_t cn9k_cryptodev_driver_id;
 
 static struct rte_pci_id pci_id_cpt_table[] = {
        {
+               RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+                              PCI_DEVID_CN9K_RVU_CPT_VF)
        },
        /* sentinel */
        {
@@ -73,10 +79,21 @@ cn9k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
                        plt_err("Failed to add engine group rc=%d", rc);
                        goto dev_fini;
                }
+
+               /* Create security context */
+               rc = cnxk_crypto_sec_ctx_create(dev);
+               if (rc)
+                       goto dev_fini;
        }
 
        dev->dev_ops = &cn9k_cpt_ops;
        dev->driver_id = cn9k_cryptodev_driver_id;
+       dev->feature_flags = cnxk_cpt_default_ff_get();
+
+       cnxk_cpt_caps_populate(vf);
+
+       cn9k_cpt_set_enqdeq_fns(dev);
+       cn9k_sec_ops_override();
 
        return 0;
 
@@ -108,6 +125,9 @@ cn9k_cpt_pci_remove(struct rte_pci_device *pci_dev)
        if (dev == NULL)
                return -ENODEV;
 
+       /* Destroy security context */
+       cnxk_crypto_sec_ctx_destroy(dev);
+
        if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
                vf = dev->data->dev_private;
                ret = roc_cpt_dev_fini(&vf->cpt);