struct roc_cpt *roc_cpt = &vf->cpt;
struct rte_pci_device *pci_dev;
struct cnxk_cpt_qp *qp;
+ uint32_t nb_desc;
int ret;
if (dev->data->queue_pairs[qp_id] != NULL)
return -EIO;
}
- qp = cnxk_cpt_qp_create(dev, qp_id, conf->nb_descriptors);
+ /* Update nb_desc to next power of 2 to aid in pending queue checks */
+ nb_desc = plt_align32pow2(conf->nb_descriptors);
+
+ qp = cnxk_cpt_qp_create(dev, qp_id, nb_desc);
if (qp == NULL) {
plt_err("Could not create queue pair %d", qp_id);
return -ENOMEM;
}
qp->lf.lf_id = qp_id;
- qp->lf.nb_desc = conf->nb_descriptors;
+ qp->lf.nb_desc = nb_desc;
ret = roc_cpt_lf_init(roc_cpt, &qp->lf);
if (ret < 0) {
cnxk_ae_session_clear(struct rte_cryptodev *dev,
struct rte_cryptodev_asym_session *sess)
{
- struct rte_mempool *sess_mp;
struct cnxk_ae_sess *priv;
- priv = get_asym_session_private_data(sess, dev->driver_id);
+ priv = (struct cnxk_ae_sess *) sess->sess_private_data;
if (priv == NULL)
return;
/* Reset and free object back to pool */
memset(priv, 0, cnxk_ae_session_size_get(dev));
- sess_mp = rte_mempool_from_obj(priv);
- set_asym_session_private_data(sess, dev->driver_id, NULL);
- rte_mempool_put(sess_mp, priv);
}
int
cnxk_ae_session_cfg(struct rte_cryptodev *dev,
struct rte_crypto_asym_xform *xform,
- struct rte_cryptodev_asym_session *sess,
- struct rte_mempool *pool)
+ struct rte_cryptodev_asym_session *sess)
{
+ struct cnxk_ae_sess *priv =
+ (struct cnxk_ae_sess *) sess->sess_private_data;
struct cnxk_cpt_vf *vf = dev->data->dev_private;
struct roc_cpt *roc_cpt = &vf->cpt;
- struct cnxk_ae_sess *priv;
union cpt_inst_w7 w7;
int ret;
- if (rte_mempool_get(pool, (void **)&priv))
- return -ENOMEM;
-
- memset(priv, 0, sizeof(struct cnxk_ae_sess));
-
ret = cnxk_ae_fill_session_parameters(priv, xform);
- if (ret) {
- rte_mempool_put(pool, priv);
+ if (ret)
return ret;
- }
w7.u64 = 0;
w7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_AE];
priv->cpt_inst_w7 = w7.u64;
priv->cnxk_fpm_iova = vf->cnxk_fpm_iova;
priv->ec_grp = vf->ec_grp;
- set_asym_session_private_data(sess, dev->driver_id, priv);
return 0;
}
+
+void
+cnxk_cpt_dump_on_err(struct cnxk_cpt_qp *qp)
+{
+ struct pending_queue *pend_q = &qp->pend_q;
+ uint64_t inflight, enq_ptr, deq_ptr, insts;
+ union cpt_lf_q_inst_ptr inst_ptr;
+ union cpt_lf_inprog lf_inprog;
+
+ plt_print("Lcore ID: %d, LF/QP ID: %d", rte_lcore_id(), qp->lf.lf_id);
+ plt_print("");
+ plt_print("S/w pending queue:");
+ plt_print("\tHead: %"PRIu64"", pend_q->head);
+ plt_print("\tTail: %"PRIu64"", pend_q->tail);
+ plt_print("\tMask: 0x%"PRIx64"", pend_q->pq_mask);
+ plt_print("\tInflight count: %"PRIu64"",
+ pending_queue_infl_cnt(pend_q->head, pend_q->tail,
+ pend_q->pq_mask));
+
+ plt_print("");
+ plt_print("H/w pending queue:");
+
+ lf_inprog.u = plt_read64(qp->lf.rbase + CPT_LF_INPROG);
+ inflight = lf_inprog.s.inflight;
+ plt_print("\tInflight in engines: %"PRIu64"", inflight);
+
+ inst_ptr.u = plt_read64(qp->lf.rbase + CPT_LF_Q_INST_PTR);
+
+ enq_ptr = inst_ptr.s.nq_ptr;
+ deq_ptr = inst_ptr.s.dq_ptr;
+
+ if (enq_ptr >= deq_ptr)
+ insts = enq_ptr - deq_ptr;
+ else
+ insts = (enq_ptr + pend_q->pq_mask + 1 + 320 + 40) - deq_ptr;
+
+ plt_print("\tNQ ptr: 0x%"PRIx64"", enq_ptr);
+ plt_print("\tDQ ptr: 0x%"PRIx64"", deq_ptr);
+ plt_print("Insts waiting in CPT: %"PRIu64"", insts);
+
+ plt_print("");
+ roc_cpt_afs_print(qp->lf.roc_cpt);
+}