uint16_t auth_iv_offset;
uint32_t salt;
uint64_t cpt_inst_w7;
+ uint64_t cpt_inst_w2;
+ struct cnxk_cpt_qp *qp;
struct roc_se_ctx roc_se_ctx;
} __rte_cache_aligned;
+static __rte_always_inline int
+fill_sess_gmac(struct rte_crypto_sym_xform *xform, struct cnxk_se_sess *sess);
+
+static inline void
+cpt_pack_iv(uint8_t *iv_src, uint8_t *iv_dst)
+{
+ iv_dst[16] = iv_src[16];
+ /* pack the last 8 bytes of IV to 6 bytes.
+ * discard the 2 MSB bits of each byte
+ */
+ iv_dst[17] = (((iv_src[17] & 0x3f) << 2) | ((iv_src[18] >> 4) & 0x3));
+ iv_dst[18] = (((iv_src[18] & 0xf) << 4) | ((iv_src[19] >> 2) & 0xf));
+ iv_dst[19] = (((iv_src[19] & 0x3) << 6) | (iv_src[20] & 0x3f));
+
+ iv_dst[20] = (((iv_src[21] & 0x3f) << 2) | ((iv_src[22] >> 4) & 0x3));
+ iv_dst[21] = (((iv_src[22] & 0xf) << 4) | ((iv_src[23] >> 2) & 0xf));
+ iv_dst[22] = (((iv_src[23] & 0x3) << 6) | (iv_src[24] & 0x3f));
+}
+
+static inline void
+pdcp_iv_copy(uint8_t *iv_d, uint8_t *iv_s, const uint8_t pdcp_alg_type,
+ uint8_t pack_iv)
+{
+ uint32_t *iv_s_temp, iv_temp[4];
+ int j;
+
+ if (pdcp_alg_type == ROC_SE_PDCP_ALG_TYPE_SNOW3G) {
+ /*
+ * DPDK seems to provide it in form of IV3 IV2 IV1 IV0
+ * and BigEndian, MC needs it as IV0 IV1 IV2 IV3
+ */
+
+ iv_s_temp = (uint32_t *)iv_s;
+
+ for (j = 0; j < 4; j++)
+ iv_temp[j] = iv_s_temp[3 - j];
+ memcpy(iv_d, iv_temp, 16);
+ } else if (pdcp_alg_type == ROC_SE_PDCP_ALG_TYPE_ZUC) {
+ /* ZUC doesn't need a swap */
+ memcpy(iv_d, iv_s, 16);
+ if (pack_iv)
+ cpt_pack_iv(iv_s, iv_d);
+ } else {
+ /* AES-CMAC EIA2, microcode expects 16B zeroized IV */
+ for (j = 0; j < 4; j++)
+ iv_d[j] = 0;
+ }
+}
+
static __rte_always_inline int
cpt_mac_len_verify(struct rte_crypto_auth_xform *auth)
{
}
static __rte_always_inline int
-cpt_zuc_snow3g_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,
- struct roc_se_fc_params *params, struct cpt_inst_s *inst)
+cpt_pdcp_alg_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,
+ struct roc_se_fc_params *params, struct cpt_inst_s *inst)
{
uint32_t size;
int32_t inputlen, outputlen;
struct roc_se_ctx *se_ctx;
uint32_t mac_len = 0;
- uint8_t pdcp_alg_type, j;
+ uint8_t pdcp_alg_type;
uint32_t encr_offset, auth_offset;
uint32_t encr_data_len, auth_data_len;
- int flags, iv_len = 16;
+ int flags, iv_len;
uint64_t offset_ctrl;
uint64_t *offset_vaddr;
- uint32_t *iv_s, iv[4];
+ uint8_t *iv_s;
+ uint8_t pack_iv = 0;
union cpt_inst_w4 cpt_inst_w4;
se_ctx = params->ctx_buf.vaddr;
mac_len = se_ctx->mac_len;
pdcp_alg_type = se_ctx->pdcp_alg_type;
- cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_ZUC_SNOW3G;
-
- /* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */
-
- cpt_inst_w4.s.opcode_minor = ((1 << 7) | (pdcp_alg_type << 5) |
- (0 << 4) | (0 << 3) | (flags & 0x7));
+ cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_PDCP;
+ cpt_inst_w4.s.opcode_minor = se_ctx->template_w4.s.opcode_minor;
if (flags == 0x1) {
+ iv_s = params->auth_iv_buf;
+
/*
* Microcode expects offsets in bytes
* TODO: Rounding off
*/
auth_data_len = ROC_SE_AUTH_DLEN(d_lens);
-
- /* EIA3 or UIA2 */
auth_offset = ROC_SE_AUTH_OFFSET(d_offs);
- auth_offset = auth_offset / 8;
- /* consider iv len */
- auth_offset += iv_len;
+ if (se_ctx->pdcp_alg_type != ROC_SE_PDCP_ALG_TYPE_AES_CTR) {
+ iv_len = params->auth_iv_len;
+
+ if (iv_len == 25) {
+ iv_len -= 2;
+ pack_iv = 1;
+ }
+
+ auth_offset = auth_offset / 8;
+
+ /* consider iv len */
+ auth_offset += iv_len;
+
+ inputlen =
+ auth_offset + (RTE_ALIGN(auth_data_len, 8) / 8);
+ } else {
+ iv_len = 16;
+
+ /* consider iv len */
+ auth_offset += iv_len;
+
+ inputlen = auth_offset + auth_data_len;
+ }
- inputlen = auth_offset + (RTE_ALIGN(auth_data_len, 8) / 8);
outputlen = mac_len;
offset_ctrl = rte_cpu_to_be_64((uint64_t)auth_offset);
encr_data_len = 0;
encr_offset = 0;
-
- iv_s = params->auth_iv_buf;
} else {
- /* EEA3 or UEA2 */
+ iv_s = params->iv_buf;
+ iv_len = params->cipher_iv_len;
+
+ if (iv_len == 25) {
+ iv_len -= 2;
+ pack_iv = 1;
+ }
+
/*
* Microcode expects offsets in bytes
* TODO: Rounding off
auth_data_len = 0;
auth_offset = 0;
-
- iv_s = params->iv_buf;
}
if (unlikely((encr_offset >> 16) || (auth_offset >> 8))) {
return -1;
}
- if (pdcp_alg_type == ROC_SE_PDCP_ALG_TYPE_SNOW3G) {
- /*
- * DPDK seems to provide it in form of IV3 IV2 IV1 IV0
- * and BigEndian, MC needs it as IV0 IV1 IV2 IV3
- */
-
- for (j = 0; j < 4; j++)
- iv[j] = iv_s[3 - j];
- } else {
- /* ZUC doesn't need a swap */
- for (j = 0; j < 4; j++)
- iv[j] = iv_s[j];
- }
-
/*
* GP op header, lengths are expected in bits.
*/
cpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;
- if (likely(iv_len)) {
- uint32_t *iv_d = (uint32_t *)((uint8_t *)offset_vaddr +
- ROC_SE_OFF_CTRL_LEN);
- memcpy(iv_d, iv, 16);
- }
+ uint8_t *iv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN);
+ pdcp_iv_copy(iv_d, iv_s, pdcp_alg_type, pack_iv);
*offset_vaddr = offset_ctrl;
} else {
struct roc_se_sglist_comp *gather_comp;
struct roc_se_sglist_comp *scatter_comp;
uint8_t *in_buffer;
- uint32_t *iv_d;
+ uint8_t *iv_d;
/* save space for iv */
offset_vaddr = m_vaddr;
- m_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + iv_len;
+ m_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN +
+ RTE_ALIGN_CEIL(iv_len, 8);
cpt_inst_w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;
/* iv offset is 0 */
*offset_vaddr = offset_ctrl;
- iv_d = (uint32_t *)((uint8_t *)offset_vaddr +
- ROC_SE_OFF_CTRL_LEN);
- memcpy(iv_d, iv, 16);
+ iv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN);
+ pdcp_iv_copy(iv_d, iv_s, pdcp_alg_type, pack_iv);
/* input data */
size = inputlen - iv_len;
/* consider iv len */
encr_offset += iv_len;
- inputlen = iv_len + (RTE_ALIGN(encr_data_len, 8) / 8);
+ inputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8);
outputlen = inputlen;
/* save space for offset ctrl & iv */
if (likely(fc_type == ROC_SE_FC_GEN)) {
ret = cpt_dec_hmac_prep(flags, d_offs, d_lens, fc_params, inst);
} else if (fc_type == ROC_SE_PDCP) {
- ret = cpt_zuc_snow3g_prep(flags, d_offs, d_lens, fc_params,
- inst);
+ ret = cpt_pdcp_alg_prep(flags, d_offs, d_lens, fc_params, inst);
} else if (fc_type == ROC_SE_KASUMI) {
ret = cpt_kasumi_dec_prep(d_offs, d_lens, fc_params, inst);
}
if (likely(fc_type == ROC_SE_FC_GEN)) {
ret = cpt_enc_hmac_prep(flags, d_offs, d_lens, fc_params, inst);
} else if (fc_type == ROC_SE_PDCP) {
- ret = cpt_zuc_snow3g_prep(flags, d_offs, d_lens, fc_params,
- inst);
+ ret = cpt_pdcp_alg_prep(flags, d_offs, d_lens, fc_params, inst);
} else if (fc_type == ROC_SE_KASUMI) {
ret = cpt_kasumi_enc_prep(flags, d_offs, d_lens, fc_params,
inst);
break;
case RTE_CRYPTO_CIPHER_ZUC_EEA3:
enc_type = ROC_SE_ZUC_EEA3;
- cipher_key_len = 16;
+ cipher_key_len = c_form->key.length;
zsk_flag = ROC_SE_ZS_EA;
break;
case RTE_CRYPTO_CIPHER_AES_XTS:
NULL)))
return -1;
+ if ((enc_type >= ROC_SE_ZUC_EEA3) && (enc_type <= ROC_SE_AES_CTR_EEA2))
+ roc_se_ctx_swap(&sess->roc_se_ctx);
return 0;
}
roc_se_auth_type auth_type = 0; /* NULL Auth type */
uint8_t zsk_flag = 0, aes_gcm = 0, is_null = 0;
+ if (xform->auth.algo == RTE_CRYPTO_AUTH_AES_GMAC)
+ return fill_sess_gmac(xform, sess);
+
if (xform->next != NULL &&
xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER &&
xform->next->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) {
auth_type = 0;
is_null = 1;
break;
- case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
case RTE_CRYPTO_AUTH_AES_CMAC:
+ auth_type = ROC_SE_AES_CMAC_EIA2;
+ zsk_flag = ROC_SE_ZS_IA;
+ break;
+ case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
case RTE_CRYPTO_AUTH_AES_CBC_MAC:
plt_dp_err("Crypto: Unsupported hash algo %u", a_form->algo);
return -1;
a_form->digest_length)))
return -1;
+ if ((auth_type >= ROC_SE_ZUC_EIA3) &&
+ (auth_type <= ROC_SE_AES_CMAC_EIA2))
+ roc_se_ctx_swap(&sess->roc_se_ctx);
+
return 0;
}
return 0;
}
-static __rte_always_inline uint32_t
+static __rte_always_inline void
prepare_iov_from_pkt_inplace(struct rte_mbuf *pkt,
struct roc_se_fc_params *param, uint32_t *flags)
{
param->bufs[0].vaddr = seg_data;
param->bufs[0].size = seg_size;
- return 0;
+ return;
}
iovec = param->src_iov;
iovec->bufs[index].vaddr = seg_data;
}
iovec->buf_cnt = index;
- return 0;
+ return;
}
static __rte_always_inline int
uint32_t iv_buf[4];
int ret;
+ fc_params.cipher_iv_len = sess->iv_length;
+ fc_params.auth_iv_len = sess->auth_iv_length;
+
if (likely(sess->iv_length)) {
flags |= ROC_SE_VALID_IV_BUF;
fc_params.iv_buf = rte_crypto_op_ctod_offset(cop, uint8_t *,
*/
fc_params.dst_iov = fc_params.src_iov = (void *)src;
- if (unlikely(prepare_iov_from_pkt_inplace(m_src, &fc_params,
- &flags))) {
- plt_dp_err("Prepare inplace src iov failed");
- ret = -EINVAL;
- goto err_exit;
- }
+ prepare_iov_from_pkt_inplace(m_src, &fc_params, &flags);
} else {
/* Out of place processing */
*/
d_offs = auth_range_off;
auth_range_off = 0;
+ params.auth_iv_len = sess->auth_iv_length;
params.auth_iv_buf = rte_crypto_op_ctod_offset(
cop, uint8_t *, sess->auth_iv_offset);
if (sess->zsk_flag == ROC_SE_K_F9) {
git.droids-corp.org / dpdk.git / blobdiff