crypto/qat: refactor asym algorithm macros and logs

[dpdk.git] / drivers / crypto / dpaa2_sec / dpaa2_sec_priv.h

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index 7dbc69f..63f4c64 100644 (file)
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2016,2020-2021 NXP
+ *   Copyright 2016,2020-2022 NXP
  *
  */
 
@@ -15,23 +15,35 @@
 #define CRYPTODEV_NAME_DPAA2_SEC_PMD   crypto_dpaa2_sec
 /**< NXP DPAA2 - SEC PMD device name */
 
+extern uint8_t cryptodev_driver_id;
+
+/* FLE_POOL_NUM_BUFS is set as per the ipsec-secgw application */
+#define FLE_POOL_NUM_BUFS      32000
+#define FLE_POOL_BUF_SIZE      256
+#define FLE_POOL_CACHE_SIZE    512
+#define FLE_SG_MEM_SIZE(num)   (FLE_POOL_BUF_SIZE + ((num) * 32))
+#define SEC_FLC_DHR_OUTBOUND   -114
+#define SEC_FLC_DHR_INBOUND    0
+
 #define MAX_QUEUES             64
 #define MAX_DESC_SIZE          64
 /** private data structure for each DPAA2_SEC device */
 struct dpaa2_sec_dev_private {
        void *mc_portal; /**< MC Portal for configuring this device */
        void *hw; /**< Hardware handle for this device.Used by NADK framework */
-       struct rte_mempool *fle_pool; /* per device memory pool for FLE */
        int32_t hw_id; /**< An unique ID of this device instance */
        int32_t vfio_fd; /**< File descriptor received via VFIO */
        uint16_t token; /**< Token required by DPxxx objects */
        unsigned int max_nb_queue_pairs;
        /**< Max number of queue pairs supported by device */
+       uint8_t en_ordered;
+       uint8_t en_loose_ordered;
 };
 
 struct dpaa2_sec_qp {
        struct dpaa2_queue rx_vq;
        struct dpaa2_queue tx_vq;
+       struct rte_mempool *fle_pool; /* per device memory pool for FLE */
 };
 
 enum shr_desc_type {
@@ -115,7 +127,6 @@ struct sec_flc_desc {
 };
 
 struct ctxt_priv {
-       struct rte_mempool *fle_pool; /* per device memory pool for FLE */
        struct sec_flc_desc flc_desc[0];
 };
 
@@ -158,6 +169,25 @@ struct dpaa2_pdcp_ctxt {
        uint32_t hfn_threshold; /*!< HFN Threashold for key renegotiation */
 };
 #endif
+
+typedef int (*dpaa2_sec_build_fd_t)(
+       void *qp, uint8_t *drv_ctx, struct rte_crypto_vec *data_vec,
+       uint16_t n_data_vecs, union rte_crypto_sym_ofs ofs,
+       struct rte_crypto_va_iova_ptr *iv,
+       struct rte_crypto_va_iova_ptr *digest,
+       struct rte_crypto_va_iova_ptr *aad_or_auth_iv,
+       void *user_data);
+
+typedef int (*dpaa2_sec_build_raw_dp_fd_t)(uint8_t *drv_ctx,
+                      struct rte_crypto_sgl *sgl,
+                      struct rte_crypto_sgl *dest_sgl,
+                      struct rte_crypto_va_iova_ptr *iv,
+                      struct rte_crypto_va_iova_ptr *digest,
+                      struct rte_crypto_va_iova_ptr *auth_iv,
+                      union rte_crypto_sym_ofs ofs,
+                      void *userdata,
+                      struct qbman_fd *fd);
+
 typedef struct dpaa2_sec_session_entry {
        void *ctxt;
        uint8_t ctxt_type;
@@ -165,6 +195,8 @@ typedef struct dpaa2_sec_session_entry {
        enum rte_crypto_cipher_algorithm cipher_alg; /*!< Cipher Algorithm*/
        enum rte_crypto_auth_algorithm auth_alg; /*!< Authentication Algorithm*/
        enum rte_crypto_aead_algorithm aead_alg; /*!< AEAD Algorithm*/
+       dpaa2_sec_build_fd_t build_fd;
+       dpaa2_sec_build_raw_dp_fd_t build_raw_dp_fd;
        union {
                struct {
                        uint8_t *data;  /**< pointer to key data */
@@ -201,27 +233,6 @@ typedef struct dpaa2_sec_session_entry {
 
 static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
        /* Symmetric capabilities */
-       {       /* NULL (AUTH) */
-               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
-               {.sym = {
-                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
-                       {.auth = {
-                               .algo = RTE_CRYPTO_AUTH_NULL,
-                               .block_size = 1,
-                               .key_size = {
-                                       .min = 0,
-                                       .max = 0,
-                                       .increment = 0
-                               },
-                               .digest_size = {
-                                       .min = 0,
-                                       .max = 0,
-                                       .increment = 0
-                               },
-                               .iv_size = { 0 }
-                       }, },
-               }, },
-       },
        {       /* MD5 */
                .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
                {.sym = {
@@ -539,34 +550,15 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {
                                        .increment = 1
                                },
                                .digest_size = {
-                                       .min = 4,
+                                       .min = 12,
                                        .max = 16,
                                        .increment = 4
                                },
-                               .aad_size = { 0 }
+                               .aad_size = { 0 },
+                               .iv_size = { 0 }
                        }, }
                }, }
        },
-       {       /* NULL (CIPHER) */
-               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
-               {.sym = {
-                       .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
-                       {.cipher = {
-                               .algo = RTE_CRYPTO_CIPHER_NULL,
-                               .block_size = 1,
-                               .key_size = {
-                                       .min = 0,
-                                       .max = 0,
-                                       .increment = 0
-                               },
-                               .iv_size = {
-                                       .min = 0,
-                                       .max = 0,
-                                       .increment = 0
-                               }
-                       }, },
-               }, }
-       },
        {       /* AES CBC */
                .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
                {.sym = {
@@ -941,6 +933,15 @@ static const struct rte_security_capability dpaa2_sec_security_cap[] = {
                },
                .crypto_capabilities = dpaa2_pdcp_capabilities
        },
+       { /* PDCP Lookaside Protocol offload Short MAC */
+               .action = RTE_SECURITY_ACTION_TYPE_LOOKASIDE_PROTOCOL,
+               .protocol = RTE_SECURITY_PROTOCOL_PDCP,
+               .pdcp = {
+                       .domain = RTE_SECURITY_PDCP_MODE_SHORT_MAC,
+                       .capa_flags = 0
+               },
+               .crypto_capabilities = dpaa2_pdcp_capabilities
+       },
        {
                .action = RTE_SECURITY_ACTION_TYPE_NONE
        }
@@ -974,4 +975,14 @@ calc_chksum(void *buffer, int len)
        return  result;
 }
 
+int
+dpaa2_sec_configure_raw_dp_ctx(struct rte_cryptodev *dev, uint16_t qp_id,
+       struct rte_crypto_raw_dp_ctx *raw_dp_ctx,
+       enum rte_crypto_op_sess_type sess_type,
+       union rte_cryptodev_session_ctx session_ctx, uint8_t is_update);
+
+int
+dpaa2_sec_get_dp_ctx_size(struct rte_cryptodev *dev);
+
+
 #endif /* _DPAA2_SEC_PMD_PRIVATE_H_ */