pdump: free mbuf in bulk

[dpdk.git] / drivers / crypto / nitrox / nitrox_qp.c

diff --git a/drivers/crypto/nitrox/nitrox_qp.c b/drivers/crypto/nitrox/nitrox_qp.c
index 9673bb4..5e85ccb 100644 (file)
--- a/drivers/crypto/nitrox/nitrox_qp.c
+++ b/drivers/crypto/nitrox/nitrox_qp.c
@@ -10,6 +10,38 @@
 #include "nitrox_logs.h"
 
 #define MAX_CMD_QLEN 16384
+#define CMDQ_PKT_IN_ALIGN 16
+
+static int
+nitrox_setup_cmdq(struct nitrox_qp *qp, uint8_t *bar_addr,
+                 const char *dev_name, uint8_t instr_size, int socket_id)
+{
+       char mz_name[RTE_MEMZONE_NAMESIZE];
+       const struct rte_memzone *mz;
+       size_t cmdq_size = qp->count * instr_size;
+       uint64_t offset;
+
+       snprintf(mz_name, sizeof(mz_name), "%s_cmdq_%d", dev_name, qp->qno);
+       mz = rte_memzone_reserve_aligned(mz_name, cmdq_size, socket_id,
+                                        RTE_MEMZONE_SIZE_HINT_ONLY |
+                                        RTE_MEMZONE_256MB,
+                                        CMDQ_PKT_IN_ALIGN);
+       if (!mz) {
+               NITROX_LOG(ERR, "cmdq memzone reserve failed for %s queue\n",
+                          mz_name);
+               return -ENOMEM;
+       }
+
+       qp->cmdq.mz = mz;
+       offset = NPS_PKT_IN_INSTR_BAOFF_DBELLX(qp->qno);
+       qp->cmdq.dbell_csr_addr = NITROX_CSR_ADDR(bar_addr, offset);
+       qp->cmdq.ring = mz->addr;
+       qp->cmdq.instr_size = instr_size;
+       setup_nps_pkt_input_ring(bar_addr, qp->qno, qp->count, mz->iova);
+       setup_nps_pkt_solicit_output_port(bar_addr, qp->qno);
+
+       return 0;
+}
 
 static int
 nitrox_setup_ridq(struct nitrox_qp *qp, int socket_id)
@@ -27,6 +59,14 @@ nitrox_setup_ridq(struct nitrox_qp *qp, int socket_id)
        return 0;
 }
 
+static int
+nitrox_release_cmdq(struct nitrox_qp *qp, uint8_t *bar_addr)
+{
+       nps_pkt_solicited_port_disable(bar_addr, qp->qno);
+       nps_pkt_input_ring_disable(bar_addr, qp->qno);
+       return rte_memzone_free(qp->cmdq.mz);
+}
+
 int
 nitrox_qp_setup(struct nitrox_qp *qp, uint8_t *bar_addr, const char *dev_name,
                uint32_t nb_descriptors, uint8_t instr_size, int socket_id)
@@ -34,8 +74,6 @@ nitrox_qp_setup(struct nitrox_qp *qp, uint8_t *bar_addr, const char *dev_name,
        int err;
        uint32_t count;
 
-       RTE_SET_USED(bar_addr);
-       RTE_SET_USED(instr_size);
        count = rte_align32pow2(nb_descriptors);
        if (count > MAX_CMD_QLEN) {
                NITROX_LOG(ERR, "%s: Number of descriptors too big %d,"
@@ -48,6 +86,10 @@ nitrox_qp_setup(struct nitrox_qp *qp, uint8_t *bar_addr, const char *dev_name,
        qp->count = count;
        qp->head = qp->tail = 0;
        rte_atomic16_init(&qp->pending_count);
+       err = nitrox_setup_cmdq(qp, bar_addr, dev_name, instr_size, socket_id);
+       if (err)
+               return err;
+
        err = nitrox_setup_ridq(qp, socket_id);
        if (err)
                goto ridq_err;
@@ -55,8 +97,8 @@ nitrox_qp_setup(struct nitrox_qp *qp, uint8_t *bar_addr, const char *dev_name,
        return 0;
 
 ridq_err:
+       nitrox_release_cmdq(qp, bar_addr);
        return err;
-
 }
 
 static void
@@ -68,7 +110,6 @@ nitrox_release_ridq(struct nitrox_qp *qp)
 int
 nitrox_qp_release(struct nitrox_qp *qp, uint8_t *bar_addr)
 {
-       RTE_SET_USED(bar_addr);
        nitrox_release_ridq(qp);
-       return 0;
+       return nitrox_release_cmdq(qp, bar_addr);
 }