event/dlb2: add v2.5 start domain

[dpdk.git] / drivers / crypto / octeontx / otx_cryptodev_hw_access.c

diff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c
index ad64bf4..5229e7c 100644 (file)
--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c
+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c
@@ -412,24 +412,41 @@ otx_cpt_metabuf_mempool_create(const struct rte_cryptodev *dev,
                               int nb_elements)
 {
        char mempool_name[RTE_MEMPOOL_NAMESIZE];
-       int sg_mlen, lb_mlen, max_mlen, ret;
        struct cpt_qp_meta_info *meta_info;
        struct rte_mempool *pool;
+       int max_mlen = 0;
+       int sg_mlen = 0;
+       int lb_mlen = 0;
+       int ret;
 
-       /* Get meta len for scatter gather mode */
-       sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
+       /*
+        * Calculate metabuf length required. The 'crypto_octeontx' device
+        * would be either SYMMETRIC or ASYMMETRIC.
+        */
 
-       /* Extra 32B saved for future considerations */
-       sg_mlen += 4 * sizeof(uint64_t);
+       if (dev->feature_flags & RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO) {
 
-       /* Get meta len for linear buffer (direct) mode */
-       lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
+               /* Get meta len for scatter gather mode */
+               sg_mlen = cpt_pmd_ops_helper_get_mlen_sg_mode();
 
-       /* Extra 32B saved for future considerations */
-       lb_mlen += 4 * sizeof(uint64_t);
+               /* Extra 32B saved for future considerations */
+               sg_mlen += 4 * sizeof(uint64_t);
 
-       /* Check max requirement for meta buffer */
-       max_mlen = RTE_MAX(lb_mlen, sg_mlen);
+               /* Get meta len for linear buffer (direct) mode */
+               lb_mlen = cpt_pmd_ops_helper_get_mlen_direct_mode();
+
+               /* Extra 32B saved for future considerations */
+               lb_mlen += 4 * sizeof(uint64_t);
+
+               /* Check max requirement for meta buffer */
+               max_mlen = RTE_MAX(lb_mlen, sg_mlen);
+       } else {
+
+               /* Asymmetric device */
+
+               /* Get meta len for asymmetric operations */
+               max_mlen = cpt_pmd_ops_helper_asym_get_mlen();
+       }
 
        /* Allocate mempool */
 
@@ -518,7 +535,7 @@ otx_cpt_get_resource(const struct rte_cryptodev *dev, uint8_t group,
        len = chunks * RTE_ALIGN(sizeof(struct command_chunk), 8);
 
        /* For pending queue */
-       len += qlen * RTE_ALIGN(sizeof(struct rid), 8);
+       len += qlen * sizeof(uintptr_t);
 
        /* So that instruction queues start as pg size aligned */
        len = RTE_ALIGN(len, pg_sz);
@@ -539,7 +556,7 @@ otx_cpt_get_resource(const struct rte_cryptodev *dev, uint8_t group,
        }
 
        mem = rz->addr;
-       dma_addr = rz->phys_addr;
+       dma_addr = rz->iova;
        alloc_len = len;
 
        memset(mem, 0, len);
@@ -553,14 +570,14 @@ otx_cpt_get_resource(const struct rte_cryptodev *dev, uint8_t group,
        }
 
        /* Pending queue setup */
-       cptvf->pqueue.rid_queue = (struct rid *)mem;
+       cptvf->pqueue.req_queue = (uintptr_t *)mem;
        cptvf->pqueue.enq_tail = 0;
        cptvf->pqueue.deq_head = 0;
        cptvf->pqueue.pending_count = 0;
 
-       mem +=  qlen * RTE_ALIGN(sizeof(struct rid), 8);
-       len -=  qlen * RTE_ALIGN(sizeof(struct rid), 8);
-       dma_addr += qlen * RTE_ALIGN(sizeof(struct rid), 8);
+       mem +=  qlen * sizeof(uintptr_t);
+       len -=  qlen * sizeof(uintptr_t);
+       dma_addr += qlen * sizeof(uintptr_t);
 
        /* Alignment wastage */
        used_len = alloc_len - len;