net/qede: remove dead code

[dpdk.git] / drivers / crypto / octeontx / otx_cryptodev_hw_access.h

diff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
index affbba1..063c636 100644 (file)
--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
@@ -1,19 +1,23 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2018 Cavium, Inc
  */
-
 #ifndef _OTX_CRYPTODEV_HW_ACCESS_H_
 #define _OTX_CRYPTODEV_HW_ACCESS_H_
 
 #include <stdbool.h>
 
 #include <rte_branch_prediction.h>
+#include <rte_cryptodev.h>
+#include <rte_cycles.h>
 #include <rte_io.h>
 #include <rte_memory.h>
 #include <rte_prefetch.h>
 
+#include "otx_cryptodev.h"
+
 #include "cpt_common.h"
 #include "cpt_hw_types.h"
+#include "cpt_mcode_defines.h"
 #include "cpt_pmd_logs.h"
 
 #define CPT_INTR_POLL_INTERVAL_MS      (50)
@@ -38,6 +42,9 @@
 struct cpt_instance {
        uint32_t queue_id;
        uintptr_t rsvd;
+       struct rte_mempool *sess_mp;
+       struct rte_mempool *sess_mp_priv;
+       struct cpt_qp_meta_info meta_info;
 };
 
 struct command_chunk {
@@ -73,8 +80,6 @@ struct cpt_vf {
        struct command_queue cqueue;
        /** Pending queue information */
        struct pending_queue pqueue;
-       /** Meta information per vf */
-       struct cptvf_meta_info meta_info;
 
        /** Below fields are accessed only in control path */
 
@@ -153,7 +158,8 @@ int
 otx_cpt_deinit_device(void *dev);
 
 int
-otx_cpt_get_resource(void *dev, uint8_t group, struct cpt_instance **instance);
+otx_cpt_get_resource(const struct rte_cryptodev *dev, uint8_t group,
+                    struct cpt_instance **instance, uint16_t qp_id);
 
 int
 otx_cpt_put_resource(struct cpt_instance *instance);
@@ -187,6 +193,15 @@ otx_cpt_read_vq_doorbell(struct cpt_vf *cptvf)
        return vqx_dbell.s.dbell_cnt;
 }
 
+static __rte_always_inline void
+otx_cpt_ring_dbell(struct cpt_instance *instance, uint16_t count)
+{
+       struct cpt_vf *cptvf = (struct cpt_vf *)instance;
+       /* Memory barrier to flush pending writes */
+       rte_smp_wmb();
+       otx_cpt_write_vq_doorbell(cptvf, count);
+}
+
 static __rte_always_inline void *
 get_cpt_inst(struct command_queue *cqueue)
 {
@@ -237,7 +252,74 @@ mark_cpt_inst(struct cpt_instance *instance)
                queue->idx = 0;
                queue->cchunk = cchunk;
        }
+}
+
+static __rte_always_inline uint8_t
+check_nb_command_id(struct cpt_request_info *user_req,
+               struct cpt_instance *instance)
+{
+       uint8_t ret = ERR_REQ_PENDING;
+       struct cpt_vf *cptvf = (struct cpt_vf *)instance;
+       volatile cpt_res_s_t *cptres;
+
+       cptres = (volatile cpt_res_s_t *)user_req->completion_addr;
+
+       if (unlikely(cptres->s8x.compcode == CPT_8X_COMP_E_NOTDONE)) {
+               /*
+                * Wait for some time for this command to get completed
+                * before timing out
+                */
+               if (rte_get_timer_cycles() < user_req->time_out)
+                       return ret;
+               /*
+                * TODO: See if alternate caddr can be used to not loop
+                * longer than needed.
+                */
+               if ((cptres->s8x.compcode == CPT_8X_COMP_E_NOTDONE) &&
+                   (user_req->extra_time < TIME_IN_RESET_COUNT)) {
+                       user_req->extra_time++;
+                       return ret;
+               }
+
+               if (cptres->s8x.compcode != CPT_8X_COMP_E_NOTDONE)
+                       goto complete;
+
+               ret = ERR_REQ_TIMEOUT;
+               CPT_LOG_DP_ERR("Request %p timedout", user_req);
+               otx_cpt_poll_misc(cptvf);
+               goto exit;
+       }
+
+complete:
+       if (likely(cptres->s8x.compcode == CPT_8X_COMP_E_GOOD)) {
+               ret = 0; /* success */
+               if (unlikely((uint8_t)*user_req->alternate_caddr)) {
+                       ret = (uint8_t)*user_req->alternate_caddr;
+                       CPT_LOG_DP_ERR("Request %p : failed with microcode"
+                               " error, MC completion code : 0x%x", user_req,
+                               ret);
+               }
+               CPT_LOG_DP_DEBUG("MC status %.8x\n",
+                          *((volatile uint32_t *)user_req->alternate_caddr));
+               CPT_LOG_DP_DEBUG("HW status %.8x\n",
+                          *((volatile uint32_t *)user_req->completion_addr));
+       } else if ((cptres->s8x.compcode == CPT_8X_COMP_E_SWERR) ||
+                  (cptres->s8x.compcode == CPT_8X_COMP_E_FAULT)) {
+               ret = (uint8_t)*user_req->alternate_caddr;
+               if (!ret)
+                       ret = ERR_BAD_ALT_CCODE;
+               CPT_LOG_DP_DEBUG("Request %p : failed with %s : err code :%x",
+                          user_req,
+                          (cptres->s8x.compcode == CPT_8X_COMP_E_FAULT) ?
+                          "DMA Fault" : "Software error", ret);
+       } else {
+               CPT_LOG_DP_ERR("Request %p : unexpected completion code %d",
+                          user_req, cptres->s8x.compcode);
+               ret = (uint8_t)*user_req->alternate_caddr;
+       }
 
+exit:
+       return ret;
 }
 
 #endif /* _OTX_CRYPTODEV_HW_ACCESS_H_ */