crypto/qat: support GMAC in GEN4 legacy mode

[dpdk.git] / drivers / crypto / octeontx2 / otx2_cryptodev.c

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.c b/drivers/crypto/octeontx2/otx2_cryptodev.c
index 02d2fd8..75fb4f9 100644 (file)
--- a/drivers/crypto/octeontx2/otx2_cryptodev.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.c
@@ -37,6 +37,23 @@ static struct rte_pci_id pci_id_cpt_table[] = {
        },
 };
 
+uint64_t
+otx2_cpt_default_ff_get(void)
+{
+       return RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
+              RTE_CRYPTODEV_FF_HW_ACCELERATED |
+              RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
+              RTE_CRYPTODEV_FF_IN_PLACE_SGL |
+              RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
+              RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
+              RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
+              RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
+              RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
+              RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
+              RTE_CRYPTODEV_FF_SECURITY |
+              RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
+}
+
 static int
 otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
                   struct rte_pci_device *pci_dev)
@@ -70,36 +87,39 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 
        otx2_dev = &vf->otx2_dev;
 
-       /* Initialize the base otx2_dev object */
-       ret = otx2_dev_init(pci_dev, otx2_dev);
-       if (ret) {
-               CPT_LOG_ERR("Could not initialize otx2_dev");
-               goto pmd_destroy;
-       }
-
-       /* Get number of queues available on the device */
-       ret = otx2_cpt_available_queues_get(dev, &nb_queues);
-       if (ret) {
-               CPT_LOG_ERR("Could not determine the number of queues available");
-               goto otx2_dev_fini;
-       }
-
-       /* Don't exceed the limits set per VF */
-       nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
-
-       if (nb_queues == 0) {
-               CPT_LOG_ERR("No free queues available on the device");
-               goto otx2_dev_fini;
-       }
-
-       vf->max_queues = nb_queues;
-
-       CPT_LOG_INFO("Max queues supported by device: %d", vf->max_queues);
-
-       ret = otx2_cpt_hardware_caps_get(dev, vf->hw_caps);
-       if (ret) {
-               CPT_LOG_ERR("Could not determine hardware capabilities");
-               goto otx2_dev_fini;
+       if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+               /* Initialize the base otx2_dev object */
+               ret = otx2_dev_init(pci_dev, otx2_dev);
+               if (ret) {
+                       CPT_LOG_ERR("Could not initialize otx2_dev");
+                       goto pmd_destroy;
+               }
+
+               /* Get number of queues available on the device */
+               ret = otx2_cpt_available_queues_get(dev, &nb_queues);
+               if (ret) {
+                       CPT_LOG_ERR("Could not determine the number of queues available");
+                       goto otx2_dev_fini;
+               }
+
+               /* Don't exceed the limits set per VF */
+               nb_queues = RTE_MIN(nb_queues, OTX2_CPT_MAX_QUEUES_PER_VF);
+
+               if (nb_queues == 0) {
+                       CPT_LOG_ERR("No free queues available on the device");
+                       goto otx2_dev_fini;
+               }
+
+               vf->max_queues = nb_queues;
+
+               CPT_LOG_INFO("Max queues supported by device: %d",
+                               vf->max_queues);
+
+               ret = otx2_cpt_hardware_caps_get(dev, vf->hw_caps);
+               if (ret) {
+                       CPT_LOG_ERR("Could not determine hardware capabilities");
+                       goto otx2_dev_fini;
+               }
        }
 
        otx2_crypto_capabilities_init(vf->hw_caps);
@@ -110,21 +130,16 @@ otx2_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
        if (ret)
                goto otx2_dev_fini;
 
-       dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
-                            RTE_CRYPTODEV_FF_HW_ACCELERATED |
-                            RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
-                            RTE_CRYPTODEV_FF_IN_PLACE_SGL |
-                            RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
-                            RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
-                            RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
-                            RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT |
-                            RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
-                            RTE_CRYPTODEV_FF_SECURITY;
+       dev->feature_flags = otx2_cpt_default_ff_get();
+
+       if (rte_eal_process_type() == RTE_PROC_SECONDARY)
+               otx2_cpt_set_enqdeq_fns(dev);
 
        return 0;
 
 otx2_dev_fini:
-       otx2_dev_fini(pci_dev, otx2_dev);
+       if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+               otx2_dev_fini(pci_dev, otx2_dev);
 pmd_destroy:
        rte_cryptodev_pmd_destroy(dev);
 exit:
@@ -168,4 +183,4 @@ RTE_PMD_REGISTER_PCI_TABLE(CRYPTODEV_NAME_OCTEONTX2_PMD, pci_id_cpt_table);
 RTE_PMD_REGISTER_KMOD_DEP(CRYPTODEV_NAME_OCTEONTX2_PMD, "vfio-pci");
 RTE_PMD_REGISTER_CRYPTO_DRIVER(otx2_cryptodev_drv, otx2_cryptodev_pmd.driver,
                otx2_cryptodev_driver_id);
-RTE_LOG_REGISTER(otx2_cpt_logtype, pmd.crypto.octeontx2, NOTICE);
+RTE_LOG_REGISTER_DEFAULT(otx2_cpt_logtype, NOTICE);