eal/windows: add missing SPDX license tag

[dpdk.git] / drivers / crypto / octeontx2 / otx2_cryptodev.h

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev.h b/drivers/crypto/octeontx2/otx2_cryptodev.h
index c9fe0c8..7e8c5de 100644 (file)
--- a/drivers/crypto/octeontx2/otx2_cryptodev.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev.h
@@ -6,15 +6,46 @@
 #define _OTX2_CRYPTODEV_H_
 
 #include "cpt_common.h"
+#include "cpt_hw_types.h"
+
+#include "otx2_dev.h"
 
 /* Marvell OCTEON TX2 Crypto PMD device name */
 #define CRYPTODEV_NAME_OCTEONTX2_PMD   crypto_octeontx2
 
+#define OTX2_CPT_MAX_LFS               128
+#define OTX2_CPT_MAX_QUEUES_PER_VF     64
+#define OTX2_CPT_MAX_BLKS              2
+#define OTX2_CPT_PMD_VERSION           3
+#define OTX2_CPT_REVISION_ID_3         3
+
 /**
  * Device private data
  */
 struct otx2_cpt_vf {
-       /* To be populated */
+       struct otx2_dev otx2_dev;
+       /**< Base class */
+       uint16_t max_queues;
+       /**< Max queues supported */
+       uint8_t nb_queues;
+       /**< Number of crypto queues attached */
+       uint16_t lf_msixoff[OTX2_CPT_MAX_LFS];
+       /**< MSI-X offsets */
+       uint8_t lf_blkaddr[OTX2_CPT_MAX_LFS];
+       /**<  CPT0/1 BLKADDR of LFs */
+       uint8_t cpt_revision;
+       /**<  CPT revision */
+       uint8_t err_intr_registered:1;
+       /**< Are error interrupts registered? */
+       union cpt_eng_caps hw_caps[CPT_MAX_ENG_TYPES];
+       /**< CPT device capabilities */
+};
+
+struct cpt_meta_info {
+       uint64_t deq_op_info[5];
+       uint64_t comp_code_sz;
+       union cpt_res_s cpt_res __rte_aligned(16);
+       struct cpt_request_info cpt_req;
 };
 
 #define CPT_LOGTYPE otx2_cpt_logtype
@@ -24,6 +55,8 @@ extern int otx2_cpt_logtype;
 /*
  * Crypto device driver ID
  */
-uint8_t otx2_cryptodev_driver_id;
+extern uint8_t otx2_cryptodev_driver_id;
+
+void otx2_cpt_set_enqdeq_fns(struct rte_cryptodev *dev);
 
 #endif /* _OTX2_CRYPTODEV_H_ */