common/sfc_efx/base: add flag to use Rx prefix user flag

[dpdk.git] / drivers / crypto / octeontx2 / otx2_cryptodev_hw_access.h

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
index 43db6a6..90a338e 100644 (file)
--- a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
@@ -17,10 +17,10 @@
 #include "otx2_dev.h"
 #include "otx2_cryptodev_qp.h"
 
-/* CPT instruction queue length */
-#define OTX2_CPT_IQ_LEN                        8200
-
-#define OTX2_CPT_DEFAULT_CMD_QLEN      OTX2_CPT_IQ_LEN
+/* CPT instruction queue length.
+ * Use queue size as power of 2 for aiding in pending queue calculations.
+ */
+#define OTX2_CPT_DEFAULT_CMD_QLEN      8192
 
 /* Mask which selects all engine groups */
 #define OTX2_CPT_ENG_GRPS_MASK         0xFF
@@ -42,10 +42,11 @@
 #define OTX2_CPT_LF_NQ(a)              (0x400ull | (uint64_t)(a) << 3)
 
 #define OTX2_CPT_AF_LF_CTL(a)          (0x27000ull | (uint64_t)(a) << 3)
+#define OTX2_CPT_AF_LF_CTL2(a)         (0x29000ull | (uint64_t)(a) << 3)
 
-#define OTX2_CPT_LF_BAR2(vf, q_id) \
+#define OTX2_CPT_LF_BAR2(vf, blk_addr, q_id) \
                ((vf)->otx2_dev.bar2 + \
-                ((RVU_BLOCK_ADDR_CPT0 << 20) | ((q_id) << 12)))
+                ((blk_addr << 20) | ((q_id) << 12)))
 
 #define OTX2_CPT_QUEUE_HI_PRIO 0x1
 
@@ -110,6 +111,17 @@ union otx2_cpt_af_lf_ctl {
        } s;
 };
 
+union otx2_cpt_af_lf_ctl2 {
+       uint64_t u;
+       struct {
+               uint64_t exe_no_swap                 : 1;
+               uint64_t exe_ldwb                    : 1;
+               uint64_t reserved_2_31               : 30;
+               uint64_t sso_pf_func                 : 16;
+               uint64_t nix_pf_func                 : 16;
+       } s;
+};
+
 union otx2_cpt_lf_q_grp_ptr {
        uint64_t u;
        struct {