crypto/qat: add NULL capability

[dpdk.git] / drivers / crypto / qat / qat_adf / qat_algs_build_desc.c

diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index c658f6e..01f35d1 100644 (file)
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -58,6 +58,7 @@
 
 #include <openssl/sha.h>       /* Needed to calculate pre-compute values */
 #include <openssl/aes.h>       /* Needed to calculate pre-compute values */
+#include <openssl/md5.h>       /* Needed to calculate pre-compute values */
 
 
 /*
@@ -70,9 +71,15 @@ static int qat_hash_get_state1_size(enum icp_qat_hw_auth_algo qat_hash_alg)
        case ICP_QAT_HW_AUTH_ALGO_SHA1:
                return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA1_STATE1_SZ,
                                                QAT_HW_DEFAULT_ALIGNMENT);
+       case ICP_QAT_HW_AUTH_ALGO_SHA224:
+               return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA224_STATE1_SZ,
+                                               QAT_HW_DEFAULT_ALIGNMENT);
        case ICP_QAT_HW_AUTH_ALGO_SHA256:
                return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA256_STATE1_SZ,
                                                QAT_HW_DEFAULT_ALIGNMENT);
+       case ICP_QAT_HW_AUTH_ALGO_SHA384:
+               return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA384_STATE1_SZ,
+                                               QAT_HW_DEFAULT_ALIGNMENT);
        case ICP_QAT_HW_AUTH_ALGO_SHA512:
                return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA512_STATE1_SZ,
                                                QAT_HW_DEFAULT_ALIGNMENT);
@@ -86,6 +93,9 @@ static int qat_hash_get_state1_size(enum icp_qat_hw_auth_algo qat_hash_alg)
        case ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2:
                return QAT_HW_ROUND_UP(ICP_QAT_HW_SNOW_3G_UIA2_STATE1_SZ,
                                                QAT_HW_DEFAULT_ALIGNMENT);
+       case ICP_QAT_HW_AUTH_ALGO_MD5:
+               return QAT_HW_ROUND_UP(ICP_QAT_HW_MD5_STATE1_SZ,
+                                               QAT_HW_DEFAULT_ALIGNMENT);
        case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
                /* return maximum state1 size in this case */
                return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA512_STATE1_SZ,
@@ -103,10 +113,16 @@ static int qat_hash_get_digest_size(enum icp_qat_hw_auth_algo qat_hash_alg)
        switch (qat_hash_alg) {
        case ICP_QAT_HW_AUTH_ALGO_SHA1:
                return ICP_QAT_HW_SHA1_STATE1_SZ;
+       case ICP_QAT_HW_AUTH_ALGO_SHA224:
+               return ICP_QAT_HW_SHA224_STATE1_SZ;
        case ICP_QAT_HW_AUTH_ALGO_SHA256:
                return ICP_QAT_HW_SHA256_STATE1_SZ;
+       case ICP_QAT_HW_AUTH_ALGO_SHA384:
+               return ICP_QAT_HW_SHA384_STATE1_SZ;
        case ICP_QAT_HW_AUTH_ALGO_SHA512:
                return ICP_QAT_HW_SHA512_STATE1_SZ;
+       case ICP_QAT_HW_AUTH_ALGO_MD5:
+               return ICP_QAT_HW_MD5_STATE1_SZ;
        case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
                /* return maximum digest size in this case */
                return ICP_QAT_HW_SHA512_STATE1_SZ;
@@ -123,12 +139,18 @@ static int qat_hash_get_block_size(enum icp_qat_hw_auth_algo qat_hash_alg)
        switch (qat_hash_alg) {
        case ICP_QAT_HW_AUTH_ALGO_SHA1:
                return SHA_CBLOCK;
+       case ICP_QAT_HW_AUTH_ALGO_SHA224:
+               return SHA256_CBLOCK;
        case ICP_QAT_HW_AUTH_ALGO_SHA256:
                return SHA256_CBLOCK;
+       case ICP_QAT_HW_AUTH_ALGO_SHA384:
+               return SHA512_CBLOCK;
        case ICP_QAT_HW_AUTH_ALGO_SHA512:
                return SHA512_CBLOCK;
        case ICP_QAT_HW_AUTH_ALGO_GALOIS_128:
                return 16;
+       case ICP_QAT_HW_AUTH_ALGO_MD5:
+               return MD5_CBLOCK;
        case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
                /* return maximum block size in this case */
                return SHA512_CBLOCK;
@@ -150,6 +172,17 @@ static int partial_hash_sha1(uint8_t *data_in, uint8_t *data_out)
        return 0;
 }
 
+static int partial_hash_sha224(uint8_t *data_in, uint8_t *data_out)
+{
+       SHA256_CTX ctx;
+
+       if (!SHA224_Init(&ctx))
+               return -EFAULT;
+       SHA256_Transform(&ctx, data_in);
+       rte_memcpy(data_out, &ctx, SHA256_DIGEST_LENGTH);
+       return 0;
+}
+
 static int partial_hash_sha256(uint8_t *data_in, uint8_t *data_out)
 {
        SHA256_CTX ctx;
@@ -161,6 +194,17 @@ static int partial_hash_sha256(uint8_t *data_in, uint8_t *data_out)
        return 0;
 }
 
+static int partial_hash_sha384(uint8_t *data_in, uint8_t *data_out)
+{
+       SHA512_CTX ctx;
+
+       if (!SHA384_Init(&ctx))
+               return -EFAULT;
+       SHA512_Transform(&ctx, data_in);
+       rte_memcpy(data_out, &ctx, SHA512_DIGEST_LENGTH);
+       return 0;
+}
+
 static int partial_hash_sha512(uint8_t *data_in, uint8_t *data_out)
 {
        SHA512_CTX ctx;
@@ -172,6 +216,18 @@ static int partial_hash_sha512(uint8_t *data_in, uint8_t *data_out)
        return 0;
 }
 
+static int partial_hash_md5(uint8_t *data_in, uint8_t *data_out)
+{
+       MD5_CTX ctx;
+
+       if (!MD5_Init(&ctx))
+               return -EFAULT;
+       MD5_Transform(&ctx, data_in);
+       rte_memcpy(data_out, &ctx, MD5_DIGEST_LENGTH);
+
+       return 0;
+}
+
 static int partial_hash_compute(enum icp_qat_hw_auth_algo hash_alg,
                        uint8_t *data_in,
                        uint8_t *data_out)
@@ -199,6 +255,13 @@ static int partial_hash_compute(enum icp_qat_hw_auth_algo hash_alg,
                        *hash_state_out_be32 =
                                rte_bswap32(*(((uint32_t *)digest)+i));
                break;
+       case ICP_QAT_HW_AUTH_ALGO_SHA224:
+               if (partial_hash_sha224(data_in, digest))
+                       return -EFAULT;
+               for (i = 0; i < digest_size >> 2; i++, hash_state_out_be32++)
+                       *hash_state_out_be32 =
+                               rte_bswap32(*(((uint32_t *)digest)+i));
+               break;
        case ICP_QAT_HW_AUTH_ALGO_SHA256:
                if (partial_hash_sha256(data_in, digest))
                        return -EFAULT;
@@ -206,6 +269,13 @@ static int partial_hash_compute(enum icp_qat_hw_auth_algo hash_alg,
                        *hash_state_out_be32 =
                                rte_bswap32(*(((uint32_t *)digest)+i));
                break;
+       case ICP_QAT_HW_AUTH_ALGO_SHA384:
+               if (partial_hash_sha384(data_in, digest))
+                       return -EFAULT;
+               for (i = 0; i < digest_size >> 3; i++, hash_state_out_be64++)
+                       *hash_state_out_be64 =
+                               rte_bswap64(*(((uint64_t *)digest)+i));
+               break;
        case ICP_QAT_HW_AUTH_ALGO_SHA512:
                if (partial_hash_sha512(data_in, digest))
                        return -EFAULT;
@@ -213,6 +283,10 @@ static int partial_hash_compute(enum icp_qat_hw_auth_algo hash_alg,
                        *hash_state_out_be64 =
                                rte_bswap64(*(((uint64_t *)digest)+i));
                break;
+       case ICP_QAT_HW_AUTH_ALGO_MD5:
+               if (partial_hash_md5(data_in, data_out))
+                       return -EFAULT;
+               break;
        default:
                PMD_DRV_LOG(ERR, "invalid hash alg %u", hash_alg);
                return -EFAULT;
@@ -550,6 +624,14 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
                }
                state2_size = RTE_ALIGN_CEIL(ICP_QAT_HW_SHA1_STATE2_SZ, 8);
                break;
+       case ICP_QAT_HW_AUTH_ALGO_SHA224:
+               if (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA224,
+                       authkey, authkeylen, cdesc->cd_cur_ptr, &state1_size)) {
+                       PMD_DRV_LOG(ERR, "(SHA)precompute failed");
+                       return -EFAULT;
+               }
+               state2_size = ICP_QAT_HW_SHA224_STATE2_SZ;
+               break;
        case ICP_QAT_HW_AUTH_ALGO_SHA256:
                if (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA256,
                        authkey, authkeylen, cdesc->cd_cur_ptr, &state1_size)) {
@@ -558,6 +640,14 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
                }
                state2_size = ICP_QAT_HW_SHA256_STATE2_SZ;
                break;
+       case ICP_QAT_HW_AUTH_ALGO_SHA384:
+               if (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA384,
+                       authkey, authkeylen, cdesc->cd_cur_ptr, &state1_size)) {
+                       PMD_DRV_LOG(ERR, "(SHA)precompute failed");
+                       return -EFAULT;
+               }
+               state2_size = ICP_QAT_HW_SHA384_STATE2_SZ;
+               break;
        case ICP_QAT_HW_AUTH_ALGO_SHA512:
                if (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_SHA512,
                        authkey, authkeylen, cdesc->cd_cur_ptr, &state1_size)) {
@@ -620,6 +710,17 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
                auth_param->hash_state_sz =
                                RTE_ALIGN_CEIL(add_auth_data_length, 16) >> 3;
                break;
+       case ICP_QAT_HW_AUTH_ALGO_MD5:
+               if (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_MD5,
+                       authkey, authkeylen, cdesc->cd_cur_ptr,
+                       &state1_size)) {
+                       PMD_DRV_LOG(ERR, "(MD5)precompute failed");
+                       return -EFAULT;
+               }
+               state2_size = ICP_QAT_HW_MD5_STATE2_SZ;
+               break;
+       case ICP_QAT_HW_AUTH_ALGO_NULL:
+               break;
        default:
                PMD_DRV_LOG(ERR, "Invalid HASH alg %u", cdesc->qat_hash_alg);
                return -EFAULT;