crypto/qat: support DOCSIS BPI mode

[dpdk.git] / drivers / crypto / qat / qat_adf / qat_algs_build_desc.c

diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index 0b66b37..96835d9 100644 (file)
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -54,12 +54,31 @@
 #include <rte_crypto_sym.h>
 
 #include "../qat_logs.h"
-#include "qat_algs.h"
 
 #include <openssl/sha.h>       /* Needed to calculate pre-compute values */
 #include <openssl/aes.h>       /* Needed to calculate pre-compute values */
 #include <openssl/md5.h>       /* Needed to calculate pre-compute values */
 
+#include "qat_algs.h"
+
+/* returns block size in bytes per cipher algo */
+int qat_cipher_get_block_size(enum icp_qat_hw_cipher_algo qat_cipher_alg)
+{
+       switch (qat_cipher_alg) {
+       case ICP_QAT_HW_CIPHER_ALGO_DES:
+               return ICP_QAT_HW_DES_BLK_SZ;
+       case ICP_QAT_HW_CIPHER_ALGO_3DES:
+               return ICP_QAT_HW_3DES_BLK_SZ;
+       case ICP_QAT_HW_CIPHER_ALGO_AES128:
+       case ICP_QAT_HW_CIPHER_ALGO_AES192:
+       case ICP_QAT_HW_CIPHER_ALGO_AES256:
+               return ICP_QAT_HW_AES_BLK_SZ;
+       default:
+               PMD_DRV_LOG(ERR, "invalid block cipher alg %u", qat_cipher_alg);
+               return -EFAULT;
+       };
+       return -EFAULT;
+}
 
 /*
  * Returns size in bytes per hash algo for state1 size field in cd_ctrl
@@ -439,6 +458,8 @@ void qat_alg_init_common_hdr(struct icp_qat_fw_comn_req_hdr *header,
                                proto);
        ICP_QAT_FW_LA_UPDATE_STATE_SET(header->serv_specif_flags,
                                           ICP_QAT_FW_LA_NO_UPDATE_STATE);
+       ICP_QAT_FW_LA_DIGEST_IN_BUFFER_SET(header->serv_specif_flags,
+                                       ICP_QAT_FW_LA_NO_DIGEST_IN_BUFFER);
 }
 
 int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
@@ -516,6 +537,10 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
                total_key_size = ICP_QAT_HW_3DES_KEY_SZ;
                cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_3DES_BLK_SZ >> 3;
                proto = ICP_QAT_FW_LA_PROTO_GET(header->serv_specif_flags);
+       } else if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_DES) {
+               total_key_size = ICP_QAT_HW_DES_KEY_SZ;
+               cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_DES_BLK_SZ >> 3;
+               proto = ICP_QAT_FW_LA_PROTO_GET(header->serv_specif_flags);
        } else {
                total_key_size = cipherkeylen;
                cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_AES_BLK_SZ >> 3;
@@ -625,11 +650,13 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
                                ICP_QAT_FW_LA_NO_RET_AUTH_RES);
                ICP_QAT_FW_LA_CMP_AUTH_SET(header->serv_specif_flags,
                                ICP_QAT_FW_LA_CMP_AUTH_RES);
+               cdesc->auth_op = ICP_QAT_HW_AUTH_VERIFY;
        } else {
                ICP_QAT_FW_LA_RET_AUTH_SET(header->serv_specif_flags,
                                           ICP_QAT_FW_LA_RET_AUTH_RES);
                ICP_QAT_FW_LA_CMP_AUTH_SET(header->serv_specif_flags,
                                           ICP_QAT_FW_LA_NO_CMP_AUTH_RES);
+               cdesc->auth_op = ICP_QAT_HW_AUTH_GENERATE;
        }
 
        /*
@@ -830,6 +857,19 @@ int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
        return 0;
 }
 
+int qat_alg_validate_aes_docsisbpi_key(int key_len,
+               enum icp_qat_hw_cipher_algo *alg)
+{
+       switch (key_len) {
+       case ICP_QAT_HW_AES_128_KEY_SZ:
+               *alg = ICP_QAT_HW_CIPHER_ALGO_AES128;
+               break;
+       default:
+               return -EINVAL;
+       }
+       return 0;
+}
+
 int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
 {
        switch (key_len) {
@@ -854,6 +894,18 @@ int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
        return 0;
 }
 
+int qat_alg_validate_des_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
+{
+       switch (key_len) {
+       case ICP_QAT_HW_DES_KEY_SZ:
+               *alg = ICP_QAT_HW_CIPHER_ALGO_DES;
+               break;
+       default:
+               return -EINVAL;
+       }
+       return 0;
+}
+
 int qat_alg_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
 {
        switch (key_len) {