crypto/qat: add GMAC capability
[dpdk.git] / drivers / crypto / qat / qat_crypto.c
index b33777c..5969ba6 100644 (file)
@@ -89,6 +89,27 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
                        }, }
                }, }
        },
+       {       /* SHA224 HMAC */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
+                               .block_size = 64,
+                                       .key_size = {
+                                       .min = 64,
+                                       .max = 64,
+                                       .increment = 0
+                               },
+                               .digest_size = {
+                                       .min = 28,
+                                       .max = 28,
+                                       .increment = 0
+                               },
+                               .aad_size = { 0 }
+                       }, }
+               }, }
+       },
        {       /* SHA256 HMAC */
                .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
                {.sym = {
@@ -110,6 +131,27 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
                        }, }
                }, }
        },
+       {       /* SHA384 HMAC */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
+                               .block_size = 64,
+                               .key_size = {
+                                       .min = 128,
+                                       .max = 128,
+                                       .increment = 0
+                               },
+                               .digest_size = {
+                                       .min = 48,
+                                       .max = 48,
+                                       .increment = 0
+                                       },
+                               .aad_size = { 0 }
+                       }, }
+               }, }
+       },
        {       /* SHA512 HMAC */
                .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
                {.sym = {
@@ -131,6 +173,27 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
                        }, }
                }, }
        },
+       {       /* MD5 HMAC */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_MD5_HMAC,
+                               .block_size = 64,
+                               .key_size = {
+                                       .min = 8,
+                                       .max = 64,
+                                       .increment = 8
+                               },
+                               .digest_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               },
+                               .aad_size = { 0 }
+                       }, }
+               }, }
+       },
        {       /* AES XCBC MAC */
                .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
                {.sym = {
@@ -177,6 +240,31 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
                        }, }
                }, }
        },
+       {       /* AES GMAC (AUTH) */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_AES_GMAC,
+                               .block_size = 16,
+                               .key_size = {
+                                       .min = 16,
+                                       .max = 32,
+                                       .increment = 8
+                               },
+                               .digest_size = {
+                                       .min = 8,
+                                       .max = 16,
+                                       .increment = 4
+                               },
+                               .aad_size = {
+                                       .min = 1,
+                                       .max = 65535,
+                                       .increment = 1
+                               }
+                       }, }
+               }, }
+       },
        {       /* SNOW3G (UIA2) */
                .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
                {.sym = {
@@ -282,6 +370,92 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
                        }, }
                }, }
        },
+       {       /* NULL (AUTH) */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_NULL,
+                               .block_size = 1,
+                               .key_size = {
+                                       .min = 0,
+                                       .max = 0,
+                                       .increment = 0
+                               },
+                               .digest_size = {
+                                       .min = 0,
+                                       .max = 0,
+                                       .increment = 0
+                               },
+                               .aad_size = { 0 }
+                       }, },
+               }, },
+       },
+       {       /* NULL (CIPHER) */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+                       {.cipher = {
+                               .algo = RTE_CRYPTO_CIPHER_NULL,
+                               .block_size = 1,
+                               .key_size = {
+                                       .min = 0,
+                                       .max = 0,
+                                       .increment = 0
+                               },
+                               .iv_size = {
+                                       .min = 0,
+                                       .max = 0,
+                                       .increment = 0
+                               }
+                       }, },
+               }, }
+       },
+       {       /* KASUMI (F8) */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+                       {.cipher = {
+                               .algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
+                               .block_size = 8,
+                               .key_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               },
+                               .iv_size = {
+                                       .min = 8,
+                                       .max = 8,
+                                       .increment = 0
+                               }
+                       }, }
+               }, }
+       },
+       {       /* KASUMI (F9) */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_KASUMI_F9,
+                               .block_size = 8,
+                               .key_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               },
+                               .digest_size = {
+                                       .min = 4,
+                                       .max = 4,
+                                       .increment = 0
+                               },
+                               .aad_size = {
+                                       .min = 8,
+                                       .max = 8,
+                                       .increment = 0
+                               }
+                       }, }
+               }, }
+       },
        RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
@@ -405,11 +579,20 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
                session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
                break;
        case RTE_CRYPTO_CIPHER_NULL:
+               session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
+               break;
+       case RTE_CRYPTO_CIPHER_KASUMI_F8:
+               if (qat_alg_validate_kasumi_key(cipher_xform->key.length,
+                                       &session->qat_cipher_alg) != 0) {
+                       PMD_DRV_LOG(ERR, "Invalid KASUMI cipher key size");
+                       goto error_out;
+               }
+               session->qat_mode = ICP_QAT_HW_CIPHER_F8_MODE;
+               break;
        case RTE_CRYPTO_CIPHER_3DES_ECB:
        case RTE_CRYPTO_CIPHER_3DES_CBC:
        case RTE_CRYPTO_CIPHER_AES_ECB:
        case RTE_CRYPTO_CIPHER_AES_CCM:
-       case RTE_CRYPTO_CIPHER_KASUMI_F8:
                PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
                                cipher_xform->algo);
                goto error_out;
@@ -511,9 +694,15 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
        case RTE_CRYPTO_AUTH_SHA1_HMAC:
                session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
                break;
+       case RTE_CRYPTO_AUTH_SHA224_HMAC:
+               session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA224;
+               break;
        case RTE_CRYPTO_AUTH_SHA256_HMAC:
                session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA256;
                break;
+       case RTE_CRYPTO_AUTH_SHA384_HMAC:
+               session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA384;
+               break;
        case RTE_CRYPTO_AUTH_SHA512_HMAC:
                session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA512;
                break;
@@ -523,22 +712,28 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
        case RTE_CRYPTO_AUTH_AES_GCM:
                session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
                break;
+       case RTE_CRYPTO_AUTH_AES_GMAC:
+               session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
+               break;
        case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
                session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2;
                break;
+       case RTE_CRYPTO_AUTH_MD5_HMAC:
+               session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_MD5;
+               break;
        case RTE_CRYPTO_AUTH_NULL:
+               session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_NULL;
+               break;
+       case RTE_CRYPTO_AUTH_KASUMI_F9:
+               session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_KASUMI_F9;
+               break;
        case RTE_CRYPTO_AUTH_SHA1:
        case RTE_CRYPTO_AUTH_SHA256:
        case RTE_CRYPTO_AUTH_SHA512:
        case RTE_CRYPTO_AUTH_SHA224:
-       case RTE_CRYPTO_AUTH_SHA224_HMAC:
        case RTE_CRYPTO_AUTH_SHA384:
-       case RTE_CRYPTO_AUTH_SHA384_HMAC:
        case RTE_CRYPTO_AUTH_MD5:
-       case RTE_CRYPTO_AUTH_MD5_HMAC:
        case RTE_CRYPTO_AUTH_AES_CCM:
-       case RTE_CRYPTO_AUTH_AES_GMAC:
-       case RTE_CRYPTO_AUTH_KASUMI_F9:
        case RTE_CRYPTO_AUTH_AES_CMAC:
        case RTE_CRYPTO_AUTH_AES_CBC_MAC:
        case RTE_CRYPTO_AUTH_ZUC_EIA3:
@@ -574,7 +769,8 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
        return session;
 
 error_out:
-       rte_mempool_put(internals->sess_mp, session);
+       if (internals->sess_mp != NULL)
+               rte_mempool_put(internals->sess_mp, session);
        return NULL;
 }
 
@@ -718,7 +914,7 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 
        ctx = (struct qat_session *)op->sym->session->_private;
        qat_req = (struct icp_qat_fw_la_bulk_req *)out_msg;
-       *qat_req = ctx->fw_req;
+       rte_mov128((uint8_t *)qat_req, (const uint8_t *)&(ctx->fw_req));
        qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 
        qat_req->comn_mid.dst_length =
@@ -741,11 +937,12 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
 
        cipher_param->cipher_length = op->sym->cipher.data.length;
        cipher_param->cipher_offset = op->sym->cipher.data.offset;
-       if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2) {
+       if (ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2 ||
+                       ctx->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_KASUMI) {
                if (unlikely((cipher_param->cipher_length % BYTE_LENGTH != 0) ||
                                (cipher_param->cipher_offset
                                        % BYTE_LENGTH != 0))) {
-                       PMD_DRV_LOG(ERR, " For Snow3g, QAT PMD only "
+                       PMD_DRV_LOG(ERR, " For Snow3g/Kasumi, QAT PMD only "
                                "supports byte aligned values");
                        op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
                        return -EINVAL;
@@ -784,21 +981,26 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
                auth_param->auth_off >>= 3;
                auth_param->auth_len >>= 3;
        }
+       if ((ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER ||
+                       ctx->qat_cmd == ICP_QAT_FW_LA_CMD_CIPHER_HASH) &&
+                       ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
+               auth_param->auth_len = (auth_param->auth_len >> 3)
+                               + (auth_param->auth_off >> 3)
+                               + (BYTE_LENGTH >> 3)
+                               - 8;
+               auth_param->auth_off = 8;
+       } else if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_AUTH
+                       && ctx->qat_hash_alg ==
+                                       ICP_QAT_HW_AUTH_ALGO_KASUMI_F9) {
+               auth_param->auth_len = (auth_param->auth_len >> 3)
+                               + (auth_param->auth_off >> 3)
+                               + (BYTE_LENGTH >> 3);
+               auth_param->auth_off = 0;
+       }
        auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
-       /* (GCM) aad length(240 max) will be at this location after precompute */
+
        if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
                        ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
-               struct icp_qat_hw_auth_algo_blk *hash;
-
-               if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER)
-                       hash = (struct icp_qat_hw_auth_algo_blk *)((char *)&ctx->cd);
-               else
-                       hash = (struct icp_qat_hw_auth_algo_blk *)((char *)&ctx->cd +
-                               sizeof(struct icp_qat_hw_cipher_algo_blk));
-
-               auth_param->u2.aad_sz = ALIGN_POW2_ROUNDUP(hash->sha.state1[
-                                       ICP_QAT_HW_GALOIS_128_STATE1_SZ +
-                                       ICP_QAT_HW_GALOIS_H_SZ + 3], 16);
                if (op->sym->cipher.iv.length == 12) {
                        /*
                         * For GCM a 12 bit IV is allowed,
@@ -808,9 +1010,20 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
                                qat_req->comn_hdr.serv_specif_flags,
                                ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
                }
-       }
-       auth_param->hash_state_sz = (auth_param->u2.aad_sz) >> 3;
+               if (op->sym->cipher.data.length == 0) {
+                       /*
+                        * GMAC
+                        */
+                       qat_req->comn_mid.dest_data_addr =
+                               qat_req->comn_mid.src_data_addr =
+                                       op->sym->auth.aad.phys_addr;
+                       auth_param->u1.aad_adr = 0;
+                       auth_param->auth_len = op->sym->auth.aad.length;
+                       auth_param->u2.aad_sz = 0;
 
+               }
+
+       }
 
 #ifdef RTE_LIBRTE_PMD_QAT_DEBUG_TX
        rte_hexdump(stdout, "qat_req:", qat_req,