remove unused ring includes
[dpdk.git] / drivers / crypto / qat / qat_crypto.c
index 2bd1753..b33777c 100644 (file)
@@ -54,7 +54,6 @@
 #include <rte_lcore.h>
 #include <rte_atomic.h>
 #include <rte_branch_prediction.h>
-#include <rte_ring.h>
 #include <rte_mempool.h>
 #include <rte_mbuf.h>
 #include <rte_string_fns.h>
 
 #define BYTE_LENGTH    8
 
+static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
+       {       /* SHA1 HMAC */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
+                               .block_size = 64,
+                               .key_size = {
+                                       .min = 64,
+                                       .max = 64,
+                                       .increment = 0
+                               },
+                               .digest_size = {
+                                       .min = 20,
+                                       .max = 20,
+                                       .increment = 0
+                               },
+                               .aad_size = { 0 }
+                       }, }
+               }, }
+       },
+       {       /* SHA256 HMAC */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
+                               .block_size = 64,
+                               .key_size = {
+                                       .min = 64,
+                                       .max = 64,
+                                       .increment = 0
+                               },
+                               .digest_size = {
+                                       .min = 32,
+                                       .max = 32,
+                                       .increment = 0
+                               },
+                               .aad_size = { 0 }
+                       }, }
+               }, }
+       },
+       {       /* SHA512 HMAC */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
+                               .block_size = 128,
+                               .key_size = {
+                                       .min = 128,
+                                       .max = 128,
+                                       .increment = 0
+                               },
+                               .digest_size = {
+                                       .min = 64,
+                                       .max = 64,
+                                       .increment = 0
+                               },
+                               .aad_size = { 0 }
+                       }, }
+               }, }
+       },
+       {       /* AES XCBC MAC */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
+                               .block_size = 16,
+                               .key_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               },
+                               .digest_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               },
+                               .aad_size = { 0 }
+                       }, }
+               }, }
+       },
+       {       /* AES GCM (AUTH) */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_AES_GCM,
+                               .block_size = 16,
+                               .key_size = {
+                                       .min = 16,
+                                       .max = 32,
+                                       .increment = 8
+                               },
+                               .digest_size = {
+                                       .min = 8,
+                                       .max = 16,
+                                       .increment = 4
+                               },
+                               .aad_size = {
+                                       .min = 8,
+                                       .max = 12,
+                                       .increment = 4
+                               }
+                       }, }
+               }, }
+       },
+       {       /* SNOW3G (UIA2) */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+                       {.auth = {
+                               .algo = RTE_CRYPTO_AUTH_SNOW3G_UIA2,
+                               .block_size = 16,
+                               .key_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               },
+                               .digest_size = {
+                                       .min = 4,
+                                       .max = 4,
+                                       .increment = 0
+                               },
+                               .aad_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               }
+                       }, }
+               }, }
+       },
+       {       /* AES GCM (CIPHER) */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+                       {.cipher = {
+                               .algo = RTE_CRYPTO_CIPHER_AES_GCM,
+                               .block_size = 16,
+                               .key_size = {
+                                       .min = 16,
+                                       .max = 32,
+                                       .increment = 8
+                               },
+                               .iv_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               }
+                       }, }
+               }, }
+       },
+       {       /* AES CBC */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+                       {.cipher = {
+                               .algo = RTE_CRYPTO_CIPHER_AES_CBC,
+                               .block_size = 16,
+                               .key_size = {
+                                       .min = 16,
+                                       .max = 32,
+                                       .increment = 8
+                               },
+                               .iv_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               }
+                       }, }
+               }, }
+       },
+       {       /* SNOW3G (UEA2) */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+                       {.cipher = {
+                               .algo = RTE_CRYPTO_CIPHER_SNOW3G_UEA2,
+                               .block_size = 16,
+                               .key_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               },
+                               .iv_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               }
+                       }, }
+               }, }
+       },
+       {       /* AES CTR */
+               .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+               {.sym = {
+                       .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+                       {.cipher = {
+                               .algo = RTE_CRYPTO_CIPHER_AES_CTR,
+                               .block_size = 16,
+                               .key_size = {
+                                       .min = 16,
+                                       .max = 32,
+                                       .increment = 8
+                               },
+                               .iv_size = {
+                                       .min = 16,
+                                       .max = 16,
+                                       .increment = 0
+                               }
+                       }, }
+               }, }
+       },
+       RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
+};
+
 static inline uint32_t
 adf_modulo(uint32_t data, uint32_t shift);
 
@@ -78,14 +295,15 @@ void qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
                void *session)
 {
        struct qat_session *sess = session;
-       phys_addr_t cd_paddr = sess->cd_paddr;
+       phys_addr_t cd_paddr;
 
        PMD_INIT_FUNC_TRACE();
        if (session) {
+               cd_paddr = sess->cd_paddr;
                memset(sess, 0, qat_crypto_sym_get_session_private_size(dev));
-
                sess->cd_paddr = cd_paddr;
-       }
+       } else
+               PMD_DRV_LOG(ERR, "NULL session");
 }
 
 static int
@@ -170,6 +388,14 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
                }
                session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
                break;
+       case RTE_CRYPTO_CIPHER_AES_CTR:
+               if (qat_alg_validate_aes_key(cipher_xform->key.length,
+                               &session->qat_cipher_alg) != 0) {
+                       PMD_DRV_LOG(ERR, "Invalid AES cipher key size");
+                       goto error_out;
+               }
+               session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
+               break;
        case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
                if (qat_alg_validate_snow3g_key(cipher_xform->key.length,
                                        &session->qat_cipher_alg) != 0) {
@@ -182,7 +408,6 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
        case RTE_CRYPTO_CIPHER_3DES_ECB:
        case RTE_CRYPTO_CIPHER_3DES_CBC:
        case RTE_CRYPTO_CIPHER_AES_ECB:
-       case RTE_CRYPTO_CIPHER_AES_CTR:
        case RTE_CRYPTO_CIPHER_AES_CCM:
        case RTE_CRYPTO_CIPHER_KASUMI_F8:
                PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
@@ -296,7 +521,6 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
                session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_AES_XCBC_MAC;
                break;
        case RTE_CRYPTO_AUTH_AES_GCM:
-       case RTE_CRYPTO_AUTH_AES_GMAC:
                session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_GALOIS_128;
                break;
        case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
@@ -313,6 +537,7 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
        case RTE_CRYPTO_AUTH_MD5:
        case RTE_CRYPTO_AUTH_MD5_HMAC:
        case RTE_CRYPTO_AUTH_AES_CCM:
+       case RTE_CRYPTO_AUTH_AES_GMAC:
        case RTE_CRYPTO_AUTH_KASUMI_F9:
        case RTE_CRYPTO_AUTH_AES_CMAC:
        case RTE_CRYPTO_AUTH_AES_CBC_MAC:
@@ -334,14 +559,16 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
                                cipher_xform->key.data,
                                cipher_xform->key.length,
                                auth_xform->add_auth_data_length,
-                               auth_xform->digest_length))
+                               auth_xform->digest_length,
+                               auth_xform->op))
                        goto error_out;
        } else {
                if (qat_alg_aead_session_create_content_desc_auth(session,
                                auth_xform->key.data,
                                auth_xform->key.length,
                                auth_xform->add_auth_data_length,
-                               auth_xform->digest_length))
+                               auth_xform->digest_length,
+                               auth_xform->op))
                        goto error_out;
        }
        return session;
@@ -372,6 +599,9 @@ qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
        register uint32_t tail;
        int overflow;
 
+       if (unlikely(nb_ops == 0))
+               return 0;
+
        /* read params used a lot in main loop into registers */
        queue = &(tmp_qp->tx_q);
        base_addr = (uint8_t *)queue->base_addr;
@@ -475,13 +705,13 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
                return -EINVAL;
        }
 #endif
-       if (unlikely(op->sym->type == RTE_CRYPTO_SYM_OP_SESSIONLESS)) {
+       if (unlikely(op->sym->sess_type == RTE_CRYPTO_SYM_OP_SESSIONLESS)) {
                PMD_DRV_LOG(ERR, "QAT PMD only supports session oriented"
                                " requests, op (%p) is sessionless.", op);
                return -EINVAL;
        }
 
-       if (unlikely(op->sym->session->type != RTE_CRYPTODEV_QAT_SYM_PMD)) {
+       if (unlikely(op->sym->session->dev_type != RTE_CRYPTODEV_QAT_SYM_PMD)) {
                PMD_DRV_LOG(ERR, "Session was not created for this device");
                return -EINVAL;
        }
@@ -491,17 +721,21 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
        *qat_req = ctx->fw_req;
        qat_req->comn_mid.opaque_data = (uint64_t)(uintptr_t)op;
 
-       /*
-        * The following code assumes:
-        * - single entry buffer.
-        * - always in place.
-        */
        qat_req->comn_mid.dst_length =
-                       qat_req->comn_mid.src_length =
-                                       rte_pktmbuf_data_len(op->sym->m_src);
+               qat_req->comn_mid.src_length =
+                               rte_pktmbuf_data_len(op->sym->m_src);
+
        qat_req->comn_mid.dest_data_addr =
-                       qat_req->comn_mid.src_data_addr =
-                                       rte_pktmbuf_mtophys(op->sym->m_src);
+               qat_req->comn_mid.src_data_addr =
+                           rte_pktmbuf_mtophys(op->sym->m_src);
+
+       if (unlikely(op->sym->m_dst != NULL)) {
+               qat_req->comn_mid.dest_data_addr =
+                               rte_pktmbuf_mtophys(op->sym->m_dst);
+               qat_req->comn_mid.dst_length =
+                               rte_pktmbuf_data_len(op->sym->m_dst);
+       }
+
        cipher_param = (void *)&qat_req->serv_specif_rqpars;
        auth_param = (void *)((uint8_t *)cipher_param + sizeof(*cipher_param));
 
@@ -553,11 +787,27 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg)
        auth_param->u1.aad_adr = op->sym->auth.aad.phys_addr;
        /* (GCM) aad length(240 max) will be at this location after precompute */
        if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 ||
-               ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
-               auth_param->u2.aad_sz =
-               ALIGN_POW2_ROUNDUP(ctx->cd.hash.sha.state1[
+                       ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_64) {
+               struct icp_qat_hw_auth_algo_blk *hash;
+
+               if (ctx->qat_cmd == ICP_QAT_FW_LA_CMD_HASH_CIPHER)
+                       hash = (struct icp_qat_hw_auth_algo_blk *)((char *)&ctx->cd);
+               else
+                       hash = (struct icp_qat_hw_auth_algo_blk *)((char *)&ctx->cd +
+                               sizeof(struct icp_qat_hw_cipher_algo_blk));
+
+               auth_param->u2.aad_sz = ALIGN_POW2_ROUNDUP(hash->sha.state1[
                                        ICP_QAT_HW_GALOIS_128_STATE1_SZ +
                                        ICP_QAT_HW_GALOIS_H_SZ + 3], 16);
+               if (op->sym->cipher.iv.length == 12) {
+                       /*
+                        * For GCM a 12 bit IV is allowed,
+                        * but we need to inform the f/w
+                        */
+                       ICP_QAT_FW_LA_GCM_IV_LEN_FLAG_SET(
+                               qat_req->comn_hdr.serv_specif_flags,
+                               ICP_QAT_FW_LA_GCM_IV_LEN_12_OCTETS);
+               }
        }
        auth_param->hash_state_sz = (auth_param->u2.aad_sz) >> 3;
 
@@ -586,12 +836,15 @@ static inline uint32_t adf_modulo(uint32_t data, uint32_t shift)
        return data - mult;
 }
 
-void qat_crypto_sym_session_init(struct rte_mempool *mp, void *priv_sess)
+void qat_crypto_sym_session_init(struct rte_mempool *mp, void *sym_sess)
 {
-       struct qat_session *s = priv_sess;
+       struct rte_cryptodev_sym_session *sess = sym_sess;
+       struct qat_session *s = (void *)sess->_private;
 
        PMD_INIT_FUNC_TRACE();
-       s->cd_paddr = rte_mempool_virt2phy(mp, &s->cd);
+       s->cd_paddr = rte_mempool_virt2phy(mp, sess) +
+               offsetof(struct qat_session, cd) +
+               offsetof(struct rte_cryptodev_sym_session, _private);
 }
 
 int qat_dev_config(__rte_unused struct rte_cryptodev *dev)
@@ -636,7 +889,8 @@ void qat_dev_info_get(__rte_unused struct rte_cryptodev *dev,
                info->max_nb_queue_pairs =
                                ADF_NUM_SYM_QPS_PER_BUNDLE *
                                ADF_NUM_BUNDLES_PER_DEV;
-
+               info->feature_flags = dev->feature_flags;
+               info->capabilities = qat_pmd_capabilities;
                info->sym.max_nb_sessions = internals->max_nb_sessions;
                info->dev_type = RTE_CRYPTODEV_QAT_SYM_PMD;
        }