-/*-
- * BSD LICENSE
- *
- * Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * * Neither the name of Intel Corporation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Intel Corporation
*/
-#ifndef _QAT_CRYPTO_H_
-#define _QAT_CRYPTO_H_
+ #ifndef _QAT_CRYPTO_H_
+ #define _QAT_CRYPTO_H_
-#include <rte_cryptodev_pmd.h>
-#include <rte_memzone.h>
+#include <rte_cryptodev.h>
-#include "qat_crypto_capabilities.h"
+#include "qat_device.h"
-#define CRYPTODEV_NAME_QAT_SYM_PMD crypto_qat
-/**< Intel QAT Symmetric Crypto PMD device name */
-
-/*
- * This macro rounds up a number to a be a multiple of
- * the alignment when the alignment is a power of 2
- */
-#define ALIGN_POW2_ROUNDUP(num, align) \
- (((num) + (align) - 1) & ~((align) - 1))
-#define QAT_64_BTYE_ALIGN_MASK (~0x3f)
+extern uint8_t qat_sym_driver_id;
+extern uint8_t qat_asym_driver_id;
/**
- * Structure associated with each queue.
+ * helper macro to set cryptodev capability range
+ * <n: name> <l: min > <r: max> <i: increment> <v: value>
+ **/
+#define CAP_RNG(n, l, r, i) .n = {.min = l, .max = r, .increment = i}
+
+#define CAP_RNG_ZERO(n) .n = {.min = 0, .max = 0, .increment = 0}
+/** helper macro to set cryptodev capability value **/
+#define CAP_SET(n, v) .n = v
+
+/** private data structure for a QAT device.
+ * there can be one of these on each qat_pci_device (VF).
*/
-struct qat_queue {
- char memz_name[RTE_MEMZONE_NAMESIZE];
- void *base_addr; /* Base address */
- phys_addr_t base_phys_addr; /* Queue physical address */
- uint32_t head; /* Shadow copy of the head */
- uint32_t tail; /* Shadow copy of the tail */
- uint32_t modulo;
- uint32_t msg_size;
- uint16_t max_inflights;
- uint32_t queue_size;
- uint8_t hw_bundle_number;
- uint8_t hw_queue_number;
- /* HW queue aka ring offset on bundle */
+struct qat_cryptodev_private {
+ struct qat_pci_device *qat_dev;
+ /**< The qat pci device hosting the service */
+ uint8_t dev_id;
+ /**< Device instance for this rte_cryptodev */
+ const struct rte_cryptodev_capabilities *qat_dev_capabilities;
+ /* QAT device symmetric crypto capabilities */
+ const struct rte_memzone *capa_mz;
+ /* Shared memzone for storing capabilities */
+ uint16_t min_enq_burst_threshold;
+ uint32_t internal_capabilities; /* see flags QAT_SYM_CAP_xxx */
+ enum qat_service_type service_type;
};
-struct qat_qp {
- void *mmap_bar_addr;
- rte_atomic16_t inflights16;
- struct qat_queue tx_q;
- struct qat_queue rx_q;
- struct rte_cryptodev_stats stats;
- struct rte_mempool *op_cookie_pool;
- void **op_cookies;
- uint32_t nb_descriptors;
-} __rte_cache_aligned;
-
-/** private data structure for each QAT device */
-struct qat_pmd_private {
- unsigned max_nb_queue_pairs;
- /**< Max number of queue pairs supported by device */
- unsigned max_nb_sessions;
- /**< Max number of sessions supported by device */
- const struct rte_cryptodev_capabilities *qat_dev_capabilities;
+struct qat_capabilities_info {
+ struct rte_cryptodev_capabilities *data;
+ uint64_t size;
};
-extern uint8_t cryptodev_qat_driver_id;
+typedef struct qat_capabilities_info (*get_capabilities_info_t)
+ (struct qat_pci_device *qat_dev);
-int qat_dev_config(struct rte_cryptodev *dev,
- struct rte_cryptodev_config *config);
-int qat_dev_start(struct rte_cryptodev *dev);
-void qat_dev_stop(struct rte_cryptodev *dev);
-int qat_dev_close(struct rte_cryptodev *dev);
-void qat_dev_info_get(struct rte_cryptodev *dev,
- struct rte_cryptodev_info *info);
+typedef uint64_t (*get_feature_flags_t)(struct qat_pci_device *qat_dev);
-void qat_crypto_sym_stats_get(struct rte_cryptodev *dev,
- struct rte_cryptodev_stats *stats);
-void qat_crypto_sym_stats_reset(struct rte_cryptodev *dev);
+typedef void * (*create_security_ctx_t)(void *cryptodev);
-int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
- const struct rte_cryptodev_qp_conf *rx_conf, int socket_id);
-int qat_crypto_sym_qp_release(struct rte_cryptodev *dev,
- uint16_t queue_pair_id);
+typedef int (*set_session_t)(void *cryptodev, void *session);
-int
-qat_pmd_session_mempool_create(struct rte_cryptodev *dev,
- unsigned nb_objs, unsigned obj_cache_size, int socket_id);
+typedef int (*set_raw_dp_ctx_t)(void *raw_dp_ctx, void *ctx);
-extern unsigned
-qat_crypto_sym_get_session_private_size(struct rte_cryptodev *dev);
+struct qat_crypto_gen_dev_ops {
+ get_feature_flags_t get_feature_flags;
+ get_capabilities_info_t get_capabilities;
+ struct rte_cryptodev_ops *cryptodev_ops;
+ set_session_t set_session;
+ set_raw_dp_ctx_t set_raw_dp_ctx;
+#ifdef RTE_LIB_SECURITY
+ create_security_ctx_t create_security_ctx;
+#endif
+};
-extern int
-qat_crypto_sym_configure_session(struct rte_cryptodev *dev,
- struct rte_crypto_sym_xform *xform,
- struct rte_cryptodev_sym_session *sess,
- struct rte_mempool *mempool);
+extern struct qat_crypto_gen_dev_ops qat_sym_gen_dev_ops[];
+extern struct qat_crypto_gen_dev_ops qat_asym_gen_dev_ops[];
+int
+qat_cryptodev_config(struct rte_cryptodev *dev,
+ struct rte_cryptodev_config *config);
int
-qat_crypto_set_session_parameters(struct rte_cryptodev *dev,
- struct rte_crypto_sym_xform *xform, void *session_private);
+qat_cryptodev_start(struct rte_cryptodev *dev);
-struct qat_session *
-qat_crypto_sym_configure_session_aead(struct rte_crypto_sym_xform *xform,
- struct qat_session *session_private);
+void
+qat_cryptodev_stop(struct rte_cryptodev *dev);
-struct qat_session *
-qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
- struct rte_crypto_sym_xform *xform,
- struct qat_session *session_private);
+int
+qat_cryptodev_close(struct rte_cryptodev *dev);
-void *
-qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
- struct rte_crypto_sym_xform *xform, void *session_private);
+void
+qat_cryptodev_info_get(struct rte_cryptodev *dev,
+ struct rte_cryptodev_info *info);
+void
+qat_cryptodev_stats_get(struct rte_cryptodev *dev,
+ struct rte_cryptodev_stats *stats);
-extern void
-qat_crypto_sym_clear_session(struct rte_cryptodev *dev,
- struct rte_cryptodev_sym_session *session);
+void
+qat_cryptodev_stats_reset(struct rte_cryptodev *dev);
-extern uint16_t
-qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
- uint16_t nb_ops);
+int
+qat_cryptodev_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
+ const struct rte_cryptodev_qp_conf *qp_conf, int socket_id);
-extern uint16_t
-qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
- uint16_t nb_ops);
+int
+qat_cryptodev_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id);
-#endif /* _QAT_CRYPTO_H_ */
+#endif
git.droids-corp.org / dpdk.git / blobdiff