mempool: rename address mapping function to IOVA

[dpdk.git] / drivers / crypto / qat / qat_qp.c

diff --git a/drivers/crypto/qat/qat_qp.c b/drivers/crypto/qat/qat_qp.c
index b85b34d..ced3aa6 100644 (file)
--- a/drivers/crypto/qat/qat_qp.c
+++ b/drivers/crypto/qat/qat_qp.c
@@ -36,6 +36,8 @@
 #include <rte_malloc.h>
 #include <rte_memzone.h>
 #include <rte_cryptodev_pmd.h>
+#include <rte_pci.h>
+#include <rte_bus_pci.h>
 #include <rte_atomic.h>
 #include <rte_prefetch.h>
 
@@ -121,21 +123,17 @@ queue_dma_zone_reserve(const char *queue_name, uint32_t queue_size,
        break;
        default:
                memzone_flags = RTE_MEMZONE_SIZE_HINT_ONLY;
-}
-#ifdef RTE_LIBRTE_XEN_DOM0
-       return rte_memzone_reserve_bounded(queue_name, queue_size,
-               socket_id, 0, RTE_CACHE_LINE_SIZE, RTE_PGSIZE_2M);
-#else
+       }
        return rte_memzone_reserve_aligned(queue_name, queue_size, socket_id,
                memzone_flags, queue_size);
-#endif
 }
 
 int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
        const struct rte_cryptodev_qp_conf *qp_conf,
-       int socket_id)
+       int socket_id, struct rte_mempool *session_pool __rte_unused)
 {
        struct qat_qp *qp;
+       struct rte_pci_device *pci_dev;
        int ret;
        char op_cookie_pool_name[RTE_RING_NAMESIZE];
        uint32_t i;
@@ -156,7 +154,9 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
                return -EINVAL;
        }
 
-       if (dev->pci_dev->mem_resource[0].addr == NULL) {
+       pci_dev = RTE_DEV_TO_PCI(dev->device);
+
+       if (pci_dev->mem_resource[0].addr == NULL) {
                PMD_DRV_LOG(ERR, "Could not find VF config space "
                                "(UIO driver attached?).");
                return -EINVAL;
@@ -181,8 +181,8 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
                        qp_conf->nb_descriptors * sizeof(*qp->op_cookies),
                        RTE_CACHE_LINE_SIZE);
 
-       qp->mmap_bar_addr = dev->pci_dev->mem_resource[0].addr;
-       rte_atomic16_init(&qp->inflights16);
+       qp->mmap_bar_addr = pci_dev->mem_resource[0].addr;
+       qp->inflights16 = 0;
 
        if (qat_tx_queue_create(dev, &(qp->tx_q),
                queue_pair_id, qp_conf->nb_descriptors, socket_id) != 0) {
@@ -202,7 +202,7 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
        adf_configure_queues(qp);
        adf_queue_arb_enable(&qp->tx_q, qp->mmap_bar_addr);
        snprintf(op_cookie_pool_name, RTE_RING_NAMESIZE, "%s_qp_op_%d_%hu",
-               dev->driver->pci_drv.driver.name, dev->data->dev_id,
+               pci_dev->driver->driver.name, dev->data->dev_id,
                queue_pair_id);
 
        qp->op_cookie_pool = rte_mempool_lookup(op_cookie_pool_name);
@@ -228,17 +228,20 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
                                qp->op_cookies[i];
 
                sql_cookie->qat_sgl_src_phys_addr =
-                               rte_mempool_virt2phy(qp->op_cookie_pool,
-                               sql_cookie) +
+                               rte_mempool_virt2iova(sql_cookie) +
                                offsetof(struct qat_crypto_op_cookie,
                                qat_sgl_list_src);
 
                sql_cookie->qat_sgl_dst_phys_addr =
-                               rte_mempool_virt2phy(qp->op_cookie_pool,
-                               sql_cookie) +
+                               rte_mempool_virt2iova(sql_cookie) +
                                offsetof(struct qat_crypto_op_cookie,
                                qat_sgl_list_dst);
        }
+
+       struct qat_pmd_private *internals
+               = dev->data->dev_private;
+       qp->qat_dev_gen = internals->qat_dev_gen;
+
        dev->data->queue_pairs[queue_pair_id] = qp;
        return 0;
 
@@ -260,7 +263,7 @@ int qat_crypto_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
        }
 
        /* Don't free memory if there are still responses to be processed */
-       if (rte_atomic16_read(&(qp->inflights16)) == 0) {
+       if (qp->inflights16 == 0) {
                qat_queue_delete(&(qp->tx_q));
                qat_queue_delete(&(qp->rx_q));
        } else {
@@ -344,6 +347,7 @@ qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,
        void *io_addr;
        const struct rte_memzone *qp_mz;
        uint32_t queue_size_bytes = nb_desc*desc_size;
+       struct rte_pci_device *pci_dev;
 
        PMD_INIT_FUNC_TRACE();
        if (desc_size > ADF_MSG_SIZE_TO_BYTES(ADF_MAX_MSG_SIZE)) {
@@ -351,11 +355,13 @@ qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,
                return -EINVAL;
        }
 
+       pci_dev = RTE_DEV_TO_PCI(dev->device);
+
        /*
         * Allocate a memzone for the queue - create a unique name.
         */
        snprintf(queue->memz_name, sizeof(queue->memz_name), "%s_%s_%d_%d_%d",
-               dev->driver->pci_drv.driver.name, "qp_mem", dev->data->dev_id,
+               pci_dev->driver->driver.name, "qp_mem", dev->data->dev_id,
                queue->hw_bundle_number, queue->hw_queue_number);
        qp_mz = queue_dma_zone_reserve(queue->memz_name, queue_size_bytes,
                        socket_id);
@@ -365,7 +371,7 @@ qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,
        }
 
        queue->base_addr = (char *)qp_mz->addr;
-       queue->base_phys_addr = qp_mz->phys_addr;
+       queue->base_phys_addr = qp_mz->iova;
        if (qat_qp_check_queue_alignment(queue->base_phys_addr,
                        queue_size_bytes)) {
                PMD_DRV_LOG(ERR, "Invalid alignment on queue create "
@@ -404,7 +410,8 @@ qat_queue_create(struct rte_cryptodev *dev, struct qat_queue *queue,
 
        queue_base = BUILD_RING_BASE_ADDR(queue->base_phys_addr,
                                        queue->queue_size);
-       io_addr = dev->pci_dev->mem_resource[0].addr;
+
+       io_addr = pci_dev->mem_resource[0].addr;
 
        WRITE_CSR_RING_BASE(io_addr, queue->hw_bundle_number,
                        queue->hw_queue_number, queue_base);