net/ice/base: sign external device package programming

[dpdk.git] / drivers / crypto / qat / qat_sym.c

diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index e3f98a7..a1f5676 100644 (file)
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -144,6 +144,72 @@ set_cipher_iv_ccm(uint16_t iv_length, uint16_t iv_offset,
                        iv_length);
 }
 
+/** Handle Single-Pass AES-GMAC on QAT GEN3 */
+static inline void
+handle_spc_gmac(struct qat_sym_session *ctx, struct rte_crypto_op *op,
+               struct qat_sym_op_cookie *cookie,
+               struct icp_qat_fw_la_bulk_req *qat_req)
+{
+       static const uint32_t ver_key_offset =
+                       sizeof(struct icp_qat_hw_auth_setup) +
+                       ICP_QAT_HW_GALOIS_128_STATE1_SZ +
+                       ICP_QAT_HW_GALOIS_H_SZ + ICP_QAT_HW_GALOIS_LEN_A_SZ +
+                       ICP_QAT_HW_GALOIS_E_CTR0_SZ +
+                       sizeof(struct icp_qat_hw_cipher_config);
+       struct icp_qat_fw_cipher_cd_ctrl_hdr *cipher_cd_ctrl =
+                       (void *) &qat_req->cd_ctrl;
+       struct icp_qat_fw_la_cipher_req_params *cipher_param =
+                       (void *) &qat_req->serv_specif_rqpars;
+       uint32_t data_length = op->sym->auth.data.length;
+
+       /* Fill separate Content Descriptor for this op */
+       rte_memcpy(cookie->opt.spc_gmac.cd_cipher.key,
+                       ctx->auth_op == ICP_QAT_HW_AUTH_GENERATE ?
+                               ctx->cd.cipher.key :
+                               RTE_PTR_ADD(&ctx->cd, ver_key_offset),
+                       ctx->auth_key_length);
+       cookie->opt.spc_gmac.cd_cipher.cipher_config.val =
+                       ICP_QAT_HW_CIPHER_CONFIG_BUILD(
+                               ICP_QAT_HW_CIPHER_AEAD_MODE,
+                               ctx->qat_cipher_alg,
+                               ICP_QAT_HW_CIPHER_NO_CONVERT,
+                               (ctx->auth_op == ICP_QAT_HW_AUTH_GENERATE ?
+                                       ICP_QAT_HW_CIPHER_ENCRYPT :
+                                       ICP_QAT_HW_CIPHER_DECRYPT));
+       QAT_FIELD_SET(cookie->opt.spc_gmac.cd_cipher.cipher_config.val,
+                       ctx->digest_length,
+                       QAT_CIPHER_AEAD_HASH_CMP_LEN_BITPOS,
+                       QAT_CIPHER_AEAD_HASH_CMP_LEN_MASK);
+       cookie->opt.spc_gmac.cd_cipher.cipher_config.reserved =
+                       ICP_QAT_HW_CIPHER_CONFIG_BUILD_UPPER(data_length);
+
+       /* Update the request */
+       qat_req->cd_pars.u.s.content_desc_addr =
+                       cookie->opt.spc_gmac.cd_phys_addr;
+       qat_req->cd_pars.u.s.content_desc_params_sz = RTE_ALIGN_CEIL(
+                       sizeof(struct icp_qat_hw_cipher_config) +
+                       ctx->auth_key_length, 8) >> 3;
+       qat_req->comn_mid.src_length = data_length;
+       qat_req->comn_mid.dst_length = 0;
+
+       cipher_param->spc_aad_addr = 0;
+       cipher_param->spc_auth_res_addr = op->sym->auth.digest.phys_addr;
+       cipher_param->spc_aad_sz = data_length;
+       cipher_param->reserved = 0;
+       cipher_param->spc_auth_res_sz = ctx->digest_length;
+
+       qat_req->comn_hdr.service_cmd_id = ICP_QAT_FW_LA_CMD_CIPHER;
+       cipher_cd_ctrl->cipher_cfg_offset = 0;
+       ICP_QAT_FW_COMN_CURR_ID_SET(cipher_cd_ctrl, ICP_QAT_FW_SLICE_CIPHER);
+       ICP_QAT_FW_COMN_NEXT_ID_SET(cipher_cd_ctrl, ICP_QAT_FW_SLICE_DRAM_WR);
+       ICP_QAT_FW_LA_SINGLE_PASS_PROTO_FLAG_SET(
+                       qat_req->comn_hdr.serv_specif_flags,
+                       ICP_QAT_FW_LA_SINGLE_PASS_PROTO);
+       ICP_QAT_FW_LA_PROTO_SET(
+                       qat_req->comn_hdr.serv_specif_flags,
+                       ICP_QAT_FW_LA_NO_PROTO);
+}
+
 int
 qat_sym_build_request(void *in_op, uint8_t *out_msg,
                void *op_cookie, enum qat_device_gen qat_dev_gen)
@@ -162,6 +228,7 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
        uint8_t do_sgl = 0;
        uint8_t in_place = 1;
        int alignment_adjustment = 0;
+       int oop_shift = 0;
        struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
        struct qat_sym_op_cookie *cookie =
                                (struct qat_sym_op_cookie *)op_cookie;
@@ -180,7 +247,7 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
        } else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
                ctx = (struct qat_sym_session *)get_sym_session_private_data(
                                op->sym->session, qat_sym_driver_id);
-#ifdef RTE_LIBRTE_SECURITY
+#ifdef RTE_LIB_SECURITY
        } else {
                ctx = (struct qat_sym_session *)get_sec_session_private_data(
                                op->sym->sec_session);
@@ -472,6 +539,7 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
                        rte_pktmbuf_iova_offset(op->sym->m_src, min_ofs);
                dst_buf_start =
                        rte_pktmbuf_iova_offset(op->sym->m_dst, min_ofs);
+               oop_shift = min_ofs;
 
        } else {
                /* In-place operation
@@ -532,7 +600,7 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
                 /* First find the end of the data */
                if (do_sgl) {
                        uint32_t remaining_off = auth_param->auth_off +
-                               auth_param->auth_len + alignment_adjustment;
+                               auth_param->auth_len + alignment_adjustment + oop_shift;
                        struct rte_mbuf *sgl_buf =
                                (in_place ?
                                        op->sym->m_src : op->sym->m_dst);
@@ -619,11 +687,15 @@ qat_sym_build_request(void *in_op, uint8_t *out_msg,
                qat_req->comn_mid.dest_data_addr = dst_buf_start;
        }
 
-       /* Handle Single-Pass GCM */
        if (ctx->is_single_pass) {
+               /* Handle Single-Pass GCM */
                cipher_param->spc_aad_addr = op->sym->aead.aad.phys_addr;
                cipher_param->spc_auth_res_addr =
                                op->sym->aead.digest.phys_addr;
+       } else if (ctx->is_single_pass_gmac &&
+                      op->sym->auth.data.length <= QAT_AES_GMAC_SPC_MAX_SIZE) {
+               /* Handle Single-Pass AES-GMAC */
+               handle_spc_gmac(ctx, op, cookie, qat_req);
        }
 
 #if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG