net/iavf: support flow mark in SSE path

[dpdk.git] / drivers / crypto / qat / qat_sym_pmd.h

diff --git a/drivers/crypto/qat/qat_sym_pmd.h b/drivers/crypto/qat/qat_sym_pmd.h
index 439aeb9..a5a31e5 100644 (file)
--- a/drivers/crypto/qat/qat_sym_pmd.h
+++ b/drivers/crypto/qat/qat_sym_pmd.h
@@ -12,16 +12,18 @@
 #include "qat_sym_capabilities.h"
 #include "qat_device.h"
 
-/**< Intel(R) QAT Symmetric Crypto PMD device name */
+/** Intel(R) QAT Symmetric Crypto PMD driver name */
 #define CRYPTODEV_NAME_QAT_SYM_PMD     crypto_qat
-#define QAT_SYM_PMD_MAX_NB_SESSIONS    2048
+
+/* Internal capabilities */
+#define QAT_SYM_CAP_MIXED_CRYPTO       (1 << 0)
+#define QAT_SYM_CAP_VALID              (1 << 31)
 
 extern uint8_t cryptodev_qat_driver_id;
 
 /** private data structure for a QAT device.
  * This QAT device is a device offering only symmetric crypto service,
- * there can be one of these on each qat_pci_device (VF),
- * in future there may also be private data structures for other services.
+ * there can be one of these on each qat_pci_device (VF).
  */
 struct qat_sym_dev_private {
        struct qat_pci_device *qat_dev;
@@ -30,10 +32,13 @@ struct qat_sym_dev_private {
        /**< Device instance for this rte_cryptodev */
        const struct rte_cryptodev_capabilities *qat_dev_capabilities;
        /* QAT device symmetric crypto capabilities */
+       uint16_t min_enq_burst_threshold;
+       uint32_t internal_capabilities; /* see flags QAT_SYM_CAP_xxx */
 };
 
 int
-qat_sym_dev_create(struct qat_pci_device *qat_pci_dev);
+qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,
+               struct qat_dev_cmd_param *qat_dev_cmd_param);
 
 int
 qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev);