net/octeontx: support fast mbuf free

[dpdk.git] / drivers / crypto / qat / qat_sym_session.h

diff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h
index ce1ca5a..e6538f6 100644 (file)
--- a/drivers/crypto/qat/qat_sym_session.h
+++ b/drivers/crypto/qat/qat_sym_session.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2015-2018 Intel Corporation
+ * Copyright(c) 2015-2019 Intel Corporation
  */
 #ifndef _QAT_SYM_SESSION_H_
 #define _QAT_SYM_SESSION_H_
@@ -20,11 +20,19 @@
 
 #define KASUMI_F8_KEY_MODIFIER_4_BYTES   0x55555555
 
+/*
+ * AES-GCM J0 length
+ */
+#define AES_GCM_J0_LEN 16
+
 /* 3DES key sizes */
 #define QAT_3DES_KEY_SZ_OPT1 24 /* Keys are independent */
 #define QAT_3DES_KEY_SZ_OPT2 16 /* K3=K1 */
 #define QAT_3DES_KEY_SZ_OPT3 8 /* K1=K2=K3 */
 
+/* 96-bit case of IV for CCP/GCM single pass algorithm */
+#define QAT_AES_GCM_SPC_IV_SIZE 12
+
 
 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
        ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
@@ -59,6 +67,7 @@ struct qat_sym_session {
        enum icp_qat_hw_cipher_mode qat_mode;
        enum icp_qat_hw_auth_algo qat_hash_alg;
        enum icp_qat_hw_auth_op auth_op;
+       enum icp_qat_hw_auth_mode auth_mode;
        void *bpi_ctx;
        struct qat_sym_cd cd;
        uint8_t *cd_cur_ptr;
@@ -78,6 +87,7 @@ struct qat_sym_session {
        rte_spinlock_t lock;    /* protects this struct */
        enum qat_device_gen min_qat_dev_gen;
        uint8_t aes_cmac;
+       uint8_t is_single_pass;
 };
 
 int
@@ -91,7 +101,8 @@ qat_sym_session_set_parameters(struct rte_cryptodev *dev,
                struct rte_crypto_sym_xform *xform, void *session_private);
 
 int
-qat_sym_session_configure_aead(struct rte_crypto_sym_xform *xform,
+qat_sym_session_configure_aead(struct rte_cryptodev *dev,
+                               struct rte_crypto_sym_xform *xform,
                                struct qat_sym_session *session);
 
 int