power: add get/set pause duration API

[dpdk.git] / drivers / event / cnxk / cn10k_eventdev.c

diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c
index 776fb94..bf0a991 100644 (file)
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -108,10 +108,11 @@ cn10k_sso_hws_release(void *arg, void *hws)
        memset(ws, 0, sizeof(*ws));
 }
 
-static void
+static int
 cn10k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,
                           cnxk_handle_event_t fn, void *arg)
 {
+       uint64_t retry = CNXK_SSO_FLUSH_RETRY_MAX;
        struct cn10k_sso_hws *ws = hws;
        uint64_t cq_ds_cnt = 1;
        uint64_t aq_cnt = 1;
@@ -141,6 +142,8 @@ cn10k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,
                        fn(arg, ev);
                if (ev.sched_type != SSO_TT_EMPTY)
                        cnxk_sso_hws_swtag_flush(ws->base);
+               else if (retry-- == 0)
+                       break;
                do {
                        val = plt_read64(ws->base + SSOW_LF_GWS_PENDSTATE);
                } while (val & BIT_ULL(56));
@@ -151,8 +154,13 @@ cn10k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,
                cq_ds_cnt &= 0x3FFF3FFF0000;
        }
 
+       if (aq_cnt || cq_ds_cnt || ds_cnt)
+               return -EAGAIN;
+
        plt_write64(0, ws->base + SSOW_LF_GWS_OP_GWC_INVAL);
        rte_mb();
+
+       return 0;
 }
 
 static void
@@ -909,9 +917,13 @@ cn10k_crypto_adapter_qp_del(const struct rte_eventdev *event_dev,
 static struct eventdev_ops cn10k_sso_dev_ops = {
        .dev_infos_get = cn10k_sso_info_get,
        .dev_configure = cn10k_sso_dev_configure,
+
        .queue_def_conf = cnxk_sso_queue_def_conf,
        .queue_setup = cnxk_sso_queue_setup,
        .queue_release = cnxk_sso_queue_release,
+       .queue_attr_get = cnxk_sso_queue_attribute_get,
+       .queue_attr_set = cnxk_sso_queue_attribute_set,
+
        .port_def_conf = cnxk_sso_port_def_conf,
        .port_setup = cn10k_sso_port_setup,
        .port_release = cn10k_sso_port_release,
@@ -1000,9 +1012,11 @@ static const struct rte_pci_id cn10k_pci_sso_map[] = {
        CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
        CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
        CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
        CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
        CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
        CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
        {
                .vendor_id = 0,
        },