drivers: remove octeontx2 drivers
[dpdk.git] / drivers / event / cnxk / cn9k_eventdev.c
index c364336..8db9775 100644 (file)
                        [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)] \
                        [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)])
 
-static void
-cn9k_init_hws_ops(struct cn9k_sso_hws_state *ws, uintptr_t base)
-{
-       ws->tag_op = base + SSOW_LF_GWS_TAG;
-       ws->wqp_op = base + SSOW_LF_GWS_WQP;
-       ws->getwrk_op = base + SSOW_LF_GWS_OP_GET_WORK0;
-       ws->swtag_flush_op = base + SSOW_LF_GWS_OP_SWTAG_FLUSH;
-       ws->swtag_norm_op = base + SSOW_LF_GWS_OP_SWTAG_NORM;
-       ws->swtag_desched_op = base + SSOW_LF_GWS_OP_SWTAG_DESCHED;
-}
-
 static int
 cn9k_sso_hws_link(void *arg, void *port, uint16_t *map, uint16_t nb_link)
 {
@@ -87,7 +76,7 @@ cn9k_sso_hws_unlink(void *arg, void *port, uint16_t *map, uint16_t nb_link)
 }
 
 static void
-cn9k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)
+cn9k_sso_hws_setup(void *arg, void *hws, uintptr_t grp_base)
 {
        struct cnxk_sso_evdev *dev = arg;
        struct cn9k_sso_hws_dual *dws;
@@ -95,11 +84,10 @@ cn9k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)
        uint64_t val;
 
        /* Set get_work tmo for HWS */
-       val = NSEC2USEC(dev->deq_tmo_ns) - 1;
+       val = dev->deq_tmo_ns ? NSEC2USEC(dev->deq_tmo_ns) - 1 : 0;
        if (dev->dual_ws) {
                dws = hws;
-               rte_memcpy(dws->grps_base, grps_base,
-                          sizeof(uintptr_t) * CNXK_SSO_MAX_HWGRP);
+               dws->grp_base = grp_base;
                dws->fc_mem = (uint64_t *)dev->fc_iova;
                dws->xaq_lmt = dev->xaq_lmt;
 
@@ -107,8 +95,7 @@ cn9k_sso_hws_setup(void *arg, void *hws, uintptr_t *grps_base)
                plt_write64(val, dws->base[1] + SSOW_LF_GWS_NW_TIM);
        } else {
                ws = hws;
-               rte_memcpy(ws->grps_base, grps_base,
-                          sizeof(uintptr_t) * CNXK_SSO_MAX_HWGRP);
+               ws->grp_base = grp_base;
                ws->fc_mem = (uint64_t *)dev->fc_iova;
                ws->xaq_lmt = dev->xaq_lmt;
 
@@ -150,7 +137,6 @@ cn9k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,
 {
        struct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(arg);
        struct cn9k_sso_hws_dual *dws;
-       struct cn9k_sso_hws_state *st;
        struct cn9k_sso_hws *ws;
        uint64_t cq_ds_cnt = 1;
        uint64_t aq_cnt = 1;
@@ -172,22 +158,21 @@ cn9k_sso_hws_flush_events(void *hws, uint8_t queue_id, uintptr_t base,
 
        if (dev->dual_ws) {
                dws = hws;
-               st = &dws->ws_state[0];
                ws_base = dws->base[0];
        } else {
                ws = hws;
-               st = (struct cn9k_sso_hws_state *)ws;
                ws_base = ws->base;
        }
 
        while (aq_cnt || cq_ds_cnt || ds_cnt) {
-               plt_write64(req, st->getwrk_op);
-               cn9k_sso_hws_get_work_empty(st, &ev);
+               plt_write64(req, ws_base + SSOW_LF_GWS_OP_GET_WORK0);
+               cn9k_sso_hws_get_work_empty(ws_base, &ev);
                if (fn != NULL && ev.u64 != 0)
                        fn(arg, ev);
                if (ev.sched_type != SSO_TT_EMPTY)
-                       cnxk_sso_hws_swtag_flush(st->tag_op,
-                                                st->swtag_flush_op);
+                       cnxk_sso_hws_swtag_flush(
+                               ws_base + SSOW_LF_GWS_TAG,
+                               ws_base + SSOW_LF_GWS_OP_SWTAG_FLUSH);
                do {
                        val = plt_read64(ws_base + SSOW_LF_GWS_PENDSTATE);
                } while (val & BIT_ULL(56));
@@ -676,8 +661,6 @@ cn9k_sso_init_hws_mem(void *arg, uint8_t port_id)
                        &dev->sso, CN9K_DUAL_WS_PAIR_ID(port_id, 0));
                dws->base[1] = roc_sso_hws_base_get(
                        &dev->sso, CN9K_DUAL_WS_PAIR_ID(port_id, 1));
-               cn9k_init_hws_ops(&dws->ws_state[0], dws->base[0]);
-               cn9k_init_hws_ops(&dws->ws_state[1], dws->base[1]);
                dws->hws_id = port_id;
                dws->swtag_req = 0;
                dws->vws = 0;
@@ -697,7 +680,6 @@ cn9k_sso_init_hws_mem(void *arg, uint8_t port_id)
                /* First cache line is reserved for cookie */
                ws = RTE_PTR_ADD(ws, sizeof(struct cnxk_sso_hws_cookie));
                ws->base = roc_sso_hws_base_get(&dev->sso, port_id);
-               cn9k_init_hws_ops((struct cn9k_sso_hws_state *)ws, ws->base);
                ws->hws_id = port_id;
                ws->swtag_req = 0;
 
@@ -1145,6 +1127,16 @@ cn9k_sso_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
 }
 
 static const struct rte_pci_id cn9k_pci_sso_map[] = {
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KA, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KB, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KC, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KD, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KE, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KA, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KB, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KC, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KD, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
+       CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KE, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
        {
                .vendor_id = 0,
        },