#define CNXK_SSO_XAQ_CACHE_CNT (0x7)
#define CNXK_SSO_XAQ_SLACK (8)
#define CNXK_SSO_WQE_SG_PTR (9)
-#define CNXK_SSO_SQB_LIMIT (0x180)
#define CNXK_TT_FROM_TAG(x) (((x) >> 32) & SSO_TT_EMPTY)
#define CNXK_TT_FROM_EVENT(x) (((x) >> 38) & SSO_TT_EMPTY)
#define CNXK_EVENT_TYPE_FROM_TAG(x) (((x) >> 28) & 0xf)
#define CNXK_SUB_EVENT_FROM_TAG(x) (((x) >> 20) & 0xff)
-#define CNXK_CLR_SUB_EVENT(x) (~(0xffu << 20) & x)
+#define CNXK_CLR_SUB_EVENT(x) (~(0xffull << 20) & x)
#define CNXK_GRP_FROM_TAG(x) (((x) >> 36) & 0x3ff)
#define CNXK_SWTAG_PEND(x) (BIT_ULL(62) & x)
+#define CNXK_TAG_IS_HEAD(x) (BIT_ULL(35) & x)
#define CN9K_SSOW_GET_BASE_ADDR(_GW) ((_GW)-SSOW_LF_GWS_OP_GET_WORK0)
struct cnxk_sso_qos {
uint16_t queue;
- uint8_t xaq_prcnt;
- uint8_t taq_prcnt;
- uint8_t iaq_prcnt;
+ uint16_t xaq_prcnt;
+ uint16_t taq_prcnt;
+ uint16_t iaq_prcnt;
};
struct cnxk_sso_evdev {
uint16_t rx_adptr_pool_cnt;
uint64_t *rx_adptr_pools;
uint64_t *tx_adptr_data;
+ size_t tx_adptr_data_sz;
uint16_t max_port_id;
+ uint16_t max_queue_id[RTE_MAX_ETHPORTS];
+ uint8_t tx_adptr_configured;
uint16_t tim_adptr_ring_cnt;
uint16_t *timer_adptr_rings;
uint64_t *timer_adptr_sz;
struct cn10k_sso_hws {
uint64_t base;
+ uint64_t gw_rdata;
/* PTP timestamp */
struct cnxk_timesync_info *tstamp;
void *lookup_mem;
uint64_t *fc_mem;
uintptr_t grp_base;
/* Tx Fastpath data */
- uint64_t tx_base __rte_cache_aligned;
- uintptr_t lmt_base;
+ uintptr_t lmt_base __rte_cache_aligned;
+ uint64_t lso_tun_fmt;
uint8_t tx_adptr_data[];
} __rte_cache_aligned;
/* Event port a.k.a GWS */
struct cn9k_sso_hws {
uint64_t base;
+ uint64_t gw_wdata;
/* PTP timestamp */
struct cnxk_timesync_info *tstamp;
void *lookup_mem;
uint64_t *fc_mem;
uintptr_t grp_base;
/* Tx Fastpath data */
- uint8_t tx_adptr_data[] __rte_cache_aligned;
+ uint64_t lso_tun_fmt __rte_cache_aligned;
+ uint8_t tx_adptr_data[];
} __rte_cache_aligned;
struct cn9k_sso_hws_dual {
uint64_t base[2]; /* Ping and Pong */
+ uint64_t gw_wdata;
/* PTP timestamp */
struct cnxk_timesync_info *tstamp;
void *lookup_mem;
uint64_t *fc_mem;
uintptr_t grp_base;
/* Tx Fastpath data */
- uint8_t tx_adptr_data[] __rte_cache_aligned;
+ uint64_t lso_tun_fmt __rte_cache_aligned;
+ uint8_t tx_adptr_data[];
} __rte_cache_aligned;
struct cnxk_sso_hws_cookie {