* Copyright(C) 2021 Marvell.
*/
+#include <math.h>
+
#include "cnxk_eventdev.h"
#include "cnxk_tim_evdev.h"
-static struct rte_event_timer_adapter_ops cnxk_tim_ops;
+static struct event_timer_adapter_ops cnxk_tim_ops;
static int
cnxk_tim_chnk_pool_create(struct cnxk_tim_ring *tim_ring,
}
tim_ring->aura = roc_npa_aura_handle_to_aura(
tim_ring->chunk_pool->pool_id);
- tim_ring->ena_dfb = 0;
+ tim_ring->ena_dfb = tim_ring->ena_periodic ? 1 : 0;
} else {
tim_ring->chunk_pool = rte_mempool_create(
pool_name, tim_ring->nb_chunks, tim_ring->chunk_sz,
struct cnxk_tim_ring *tim_ring = adptr->data->adapter_priv;
adptr_info->max_tmo_ns = tim_ring->max_tout;
- adptr_info->min_resolution_ns = tim_ring->tck_nsec;
+ adptr_info->min_resolution_ns = tim_ring->ena_periodic ?
+ tim_ring->max_tout :
+ tim_ring->tck_nsec;
rte_memcpy(&adptr_info->conf, &adptr->data->conf,
sizeof(struct rte_event_timer_adapter_conf));
}
+static inline void
+sort_multi_array(double ref_arr[], uint64_t arr1[], uint64_t arr2[],
+ uint64_t arr3[], uint8_t sz)
+{
+ int x;
+
+ for (x = 0; x < sz - 1; x++) {
+ if (ref_arr[x] > ref_arr[x + 1]) {
+ PLT_SWAP(ref_arr[x], ref_arr[x + 1]);
+ PLT_SWAP(arr1[x], arr1[x + 1]);
+ PLT_SWAP(arr2[x], arr2[x + 1]);
+ PLT_SWAP(arr3[x], arr3[x + 1]);
+ x = -1;
+ }
+ }
+}
+
+static inline void
+populate_sample(uint64_t tck[], uint64_t ns[], double diff[], uint64_t dst[],
+ uint64_t req_tck, uint64_t clk_freq, double tck_ns, uint8_t sz,
+ bool mov_fwd)
+{
+ int i;
+
+ for (i = 0; i < sz; i++) {
+ tck[i] = i ? tck[i - 1] : req_tck;
+ do {
+ mov_fwd ? tck[i]++ : tck[i]--;
+ ns[i] = round((double)tck[i] * tck_ns);
+ if (round((double)tck[i] * tck_ns) >
+ ((double)tck[i] * tck_ns))
+ continue;
+ } while (ns[i] % (uint64_t)cnxk_tim_ns_per_tck(clk_freq));
+ diff[i] = PLT_MAX((double)ns[i], (double)tck[i] * tck_ns) -
+ PLT_MIN((double)ns[i], (double)tck[i] * tck_ns);
+ dst[i] = mov_fwd ? tck[i] - req_tck : req_tck - tck[i];
+ }
+}
+
+static void
+tim_adjust_resolution(uint64_t *req_ns, uint64_t *req_tck, double tck_ns,
+ uint64_t clk_freq, uint64_t max_tmo, uint64_t m_tck)
+{
+#define MAX_SAMPLES 5
+ double rmax_diff[MAX_SAMPLES], rmin_diff[MAX_SAMPLES];
+ uint64_t min_tck[MAX_SAMPLES], max_tck[MAX_SAMPLES];
+ uint64_t min_dst[MAX_SAMPLES], max_dst[MAX_SAMPLES];
+ uint64_t min_ns[MAX_SAMPLES], max_ns[MAX_SAMPLES];
+ int i;
+
+ populate_sample(max_tck, max_ns, rmax_diff, max_dst, *req_tck, clk_freq,
+ tck_ns, MAX_SAMPLES, true);
+ sort_multi_array(rmax_diff, max_dst, max_tck, max_ns, MAX_SAMPLES);
+
+ populate_sample(min_tck, min_ns, rmin_diff, min_dst, *req_tck, clk_freq,
+ tck_ns, MAX_SAMPLES, false);
+ sort_multi_array(rmin_diff, min_dst, min_tck, min_ns, MAX_SAMPLES);
+
+ for (i = 0; i < MAX_SAMPLES; i++) {
+ if (min_dst[i] < max_dst[i] && min_tck[i] > m_tck &&
+ (max_tmo / min_ns[i]) <=
+ (TIM_MAX_BUCKET_SIZE - TIM_MIN_BUCKET_SIZE)) {
+ *req_tck = min_tck[i];
+ *req_ns = min_ns[i];
+ break;
+ } else if ((max_tmo / max_ns[i]) <
+ (TIM_MAX_BUCKET_SIZE - TIM_MIN_BUCKET_SIZE)) {
+ *req_tck = max_tck[i];
+ *req_ns = max_ns[i];
+ break;
+ }
+ }
+}
+
static int
cnxk_tim_ring_create(struct rte_event_timer_adapter *adptr)
{
struct rte_event_timer_adapter_conf *rcfg = &adptr->data->conf;
struct cnxk_tim_evdev *dev = cnxk_tim_priv_get();
+ uint64_t min_intvl_ns, min_intvl_cyc;
struct cnxk_tim_ring *tim_ring;
+ enum roc_tim_clk_src clk_src;
+ uint64_t clk_freq = 0;
int i, rc;
if (dev == NULL)
goto tim_ring_free;
}
- if (NSEC2TICK(RTE_ALIGN_MUL_CEIL(
- rcfg->timer_tick_ns,
- cnxk_tim_min_resolution_ns(cnxk_tim_cntfrq())),
- cnxk_tim_cntfrq()) <
- cnxk_tim_min_tmo_ticks(cnxk_tim_cntfrq())) {
- if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES)
- rcfg->timer_tick_ns = TICK2NSEC(
- cnxk_tim_min_tmo_ticks(cnxk_tim_cntfrq()),
- cnxk_tim_cntfrq());
- else {
+ clk_src = cnxk_tim_convert_clk_src(rcfg->clk_src);
+ if (clk_src == ROC_TIM_CLK_SRC_INVALID) {
+ plt_err("Invalid clock source");
+ goto tim_hw_free;
+ }
+
+ rc = cnxk_tim_get_clk_freq(dev, clk_src, &clk_freq);
+ if (rc < 0) {
+ plt_err("Failed to get clock frequency");
+ goto tim_hw_free;
+ }
+
+ rc = roc_tim_lf_interval(&dev->tim, clk_src, clk_freq, &min_intvl_ns,
+ &min_intvl_cyc);
+ if (rc < 0) {
+ plt_err("Failed to get min interval details");
+ goto tim_hw_free;
+ }
+
+ if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_PERIODIC) {
+ /* Use 2 buckets to avoid contention */
+ rcfg->timer_tick_ns /= 2;
+ tim_ring->ena_periodic = 1;
+ }
+
+ if (rcfg->timer_tick_ns < min_intvl_ns) {
+ if (rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES) {
+ rcfg->timer_tick_ns = min_intvl_ns;
+ } else {
+ rc = -ERANGE;
+ goto tim_hw_free;
+ }
+ }
+
+ if (tim_ring->ena_periodic)
+ rcfg->max_tmo_ns = rcfg->timer_tick_ns * 2;
+
+ if (rcfg->timer_tick_ns > rcfg->max_tmo_ns) {
+ plt_err("Max timeout to too high");
+ rc = -ERANGE;
+ goto tim_hw_free;
+ }
+
+ tim_ring->tck_nsec =
+ round(RTE_ALIGN_MUL_NEAR((long double)rcfg->timer_tick_ns,
+ cnxk_tim_ns_per_tck(clk_freq)));
+ if (log10(clk_freq) - floor(log10(clk_freq)) != 0.0) {
+ uint64_t req_ns, req_tck;
+ double tck_ns;
+
+ req_ns = tim_ring->tck_nsec;
+ tck_ns = NSECPERSEC / clk_freq;
+ req_tck = round(rcfg->timer_tick_ns / tck_ns);
+ tim_adjust_resolution(&req_ns, &req_tck, tck_ns, clk_freq,
+ rcfg->max_tmo_ns, min_intvl_cyc);
+ if ((tim_ring->tck_nsec != req_ns) &&
+ !(rcfg->flags & RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES)) {
rc = -ERANGE;
goto tim_hw_free;
}
+ tim_ring->tck_nsec = ceil(req_tck * tck_ns);
}
+
+ tim_ring->tck_int = round((long double)tim_ring->tck_nsec /
+ cnxk_tim_ns_per_tck(clk_freq));
+ tim_ring->tck_nsec =
+ ceil(tim_ring->tck_int * cnxk_tim_ns_per_tck(clk_freq));
+
tim_ring->ring_id = adptr->data->id;
- tim_ring->clk_src = (int)rcfg->clk_src;
- tim_ring->tck_nsec = RTE_ALIGN_MUL_CEIL(
- rcfg->timer_tick_ns,
- cnxk_tim_min_resolution_ns(cnxk_tim_cntfrq()));
+ tim_ring->clk_src = clk_src;
tim_ring->max_tout = rcfg->max_tmo_ns;
tim_ring->nb_bkts = (tim_ring->max_tout / tim_ring->tck_nsec);
tim_ring->nb_timers = rcfg->nb_timers;
if (rc < 0)
goto tim_bkt_free;
- rc = roc_tim_lf_config(
- &dev->tim, tim_ring->ring_id,
- cnxk_tim_convert_clk_src(tim_ring->clk_src), 0, 0,
- tim_ring->nb_bkts, tim_ring->chunk_sz,
- NSEC2TICK(tim_ring->tck_nsec, cnxk_tim_cntfrq()));
+ rc = roc_tim_lf_config(&dev->tim, tim_ring->ring_id, clk_src,
+ tim_ring->ena_periodic, tim_ring->ena_dfb,
+ tim_ring->nb_bkts, tim_ring->chunk_sz,
+ tim_ring->tck_int, tim_ring->tck_nsec, clk_freq);
if (rc < 0) {
plt_err("Failed to configure timer ring");
goto tim_chnk_free;
if (rc < 0)
return rc;
- tim_ring->tck_int = NSEC2TICK(tim_ring->tck_nsec, cnxk_tim_cntfrq());
tim_ring->tot_int = tim_ring->tck_int * tim_ring->nb_bkts;
tim_ring->fast_div = rte_reciprocal_value_u64(tim_ring->tck_int);
tim_ring->fast_bkt = rte_reciprocal_value_u64(tim_ring->nb_bkts);
int
cnxk_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,
- uint32_t *caps,
- const struct rte_event_timer_adapter_ops **ops)
+ uint32_t *caps, const struct event_timer_adapter_ops **ops)
{
struct cnxk_tim_evdev *dev = cnxk_tim_priv_get();
/* Store evdev pointer for later use. */
dev->event_dev = (struct rte_eventdev *)(uintptr_t)evdev;
- *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT;
+ *caps = RTE_EVENT_TIMER_ADAPTER_CAP_INTERNAL_PORT |
+ RTE_EVENT_TIMER_ADAPTER_CAP_PERIODIC;
*ops = &cnxk_tim_ops;
return 0;
char *end = NULL;
char *f = s;
+ if (s == NULL || !strlen(s))
+ goto free;
+
while (*s) {
if (*s == '[')
start = s;
else if (*s == ']')
end = s;
+ else
+ continue;
if (start && start < end) {
*end = 0;
s++;
}
+free:
free(f);
}
return 0;
}
+static void
+cnxk_tim_parse_clk_list(const char *value, void *opaque)
+{
+ enum roc_tim_clk_src src[] = {ROC_TIM_CLK_SRC_GPIO, ROC_TIM_CLK_SRC_PTP,
+ ROC_TIM_CLK_SRC_SYNCE,
+ ROC_TIM_CLK_SRC_INVALID};
+ struct cnxk_tim_evdev *dev = opaque;
+ char *str = strdup(value);
+ char *tok;
+ int i = 0;
+
+ if (str == NULL || !strlen(str))
+ goto free;
+
+ tok = strtok(str, "-");
+ while (tok != NULL && src[i] != ROC_TIM_CLK_SRC_INVALID) {
+ dev->ext_clk_freq[src[i]] = strtoull(tok, NULL, 10);
+ tok = strtok(NULL, "-");
+ i++;
+ }
+
+free:
+ free(str);
+}
+
+static int
+cnxk_tim_parse_kvargs_dsv(const char *key, const char *value, void *opaque)
+{
+ RTE_SET_USED(key);
+
+ /* DSV format GPIO-PTP-SYNCE-BTS use '-' as ','
+ * isn't allowed. 0 represents default.
+ */
+ cnxk_tim_parse_clk_list(value, opaque);
+
+ return 0;
+}
+
static void
cnxk_tim_parse_devargs(struct rte_devargs *devargs, struct cnxk_tim_evdev *dev)
{
&dev->min_ring_cnt);
rte_kvargs_process(kvlist, CNXK_TIM_RING_CTL,
&cnxk_tim_parse_kvargs_dict, &dev);
+ rte_kvargs_process(kvlist, CNXK_TIM_EXT_CLK, &cnxk_tim_parse_kvargs_dsv,
+ dev);
rte_kvargs_free(kvlist);
}
{
struct cnxk_tim_evdev *dev = cnxk_tim_priv_get();
- if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+ if (dev == NULL || rte_eal_process_type() != RTE_PROC_PRIMARY)
return;
roc_tim_fini(&dev->tim);