/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2017,2019 NXP
+ * Copyright 2017,2019-2021 NXP
*/
#include <assert.h>
#include <rte_pci.h>
#include <rte_bus_vdev.h>
#include <ethdev_driver.h>
-#include <rte_cryptodev.h>
+#include <cryptodev_pmd.h>
#include <rte_event_eth_rx_adapter.h>
#include <rte_event_eth_tx_adapter.h>
RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |
RTE_EVENT_DEV_CAP_NONSEQ_MODE |
RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES |
- RTE_EVENT_DEV_CAP_CARRY_FLOW_ID;
+ RTE_EVENT_DEV_CAP_CARRY_FLOW_ID |
+ RTE_EVENT_DEV_CAP_MAINTENANCE_FREE;
}
struct rte_event ev[],
uint16_t nb_events)
{
- struct rte_mbuf *m = (struct rte_mbuf *)ev[0].mbuf;
+ void *txq[DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH];
+ struct rte_mbuf *m[DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH];
uint8_t qid, i;
RTE_SET_USED(port);
for (i = 0; i < nb_events; i++) {
- qid = rte_event_eth_tx_adapter_txq_get(m);
- rte_eth_tx_burst(m->port, qid, &m, 1);
+ m[i] = (struct rte_mbuf *)ev[i].mbuf;
+ qid = rte_event_eth_tx_adapter_txq_get(m[i]);
+ txq[i] = rte_eth_devices[m[i]->port].data->tx_queues[qid];
}
+ dpaa2_dev_tx_multi_txq_ordered(txq, m, nb_events);
+
return nb_events;
}
-static struct rte_eventdev_ops dpaa2_eventdev_ops = {
+static struct eventdev_ops dpaa2_eventdev_ops = {
.dev_infos_get = dpaa2_eventdev_info_get,
.dev_configure = dpaa2_eventdev_configure,
.dev_start = dpaa2_eventdev_start,
/* For secondary processes, the primary has done all the work */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
- return 0;
+ goto done;
priv = eventdev->data->dev_private;
priv->max_event_queues = 0;
RTE_LOG(INFO, PMD, "%s eventdev created\n", name);
+done:
+ event_dev_probing_finish(eventdev);
return 0;
fail:
return -EFAULT;
};
RTE_PMD_REGISTER_VDEV(EVENTDEV_NAME_DPAA2_PMD, vdev_eventdev_dpaa2_pmd);
-RTE_LOG_REGISTER(dpaa2_logtype_event, pmd.event.dpaa2, NOTICE);
+RTE_LOG_REGISTER_DEFAULT(dpaa2_logtype_event, NOTICE);