event/dsw: reduce max flows to speed up load balancing

[dpdk.git] / drivers / event / dsw / dsw_evdev.h

diff --git a/drivers/event/dsw/dsw_evdev.h b/drivers/event/dsw/dsw_evdev.h
index f6f8f04..dc44bce 100644 (file)
--- a/drivers/event/dsw/dsw_evdev.h
+++ b/drivers/event/dsw/dsw_evdev.h
@@ -10,7 +10,6 @@
 
 #define DSW_PMD_NAME RTE_STR(event_dsw)
 
-/* Code changes are required to allow more ports. */
 #define DSW_MAX_PORTS (64)
 #define DSW_MAX_PORT_DEQUEUE_DEPTH (128)
 #define DSW_MAX_PORT_ENQUEUE_DEPTH (128)
@@ -20,8 +19,20 @@
 
 #define DSW_MAX_EVENTS (16384)
 
-/* Code changes are required to allow more flows than 32k. */
-#define DSW_MAX_FLOWS_BITS (15)
+/* Multiple 24-bit flow ids will map to the same DSW-level flow. The
+ * number of DSW flows should be high enough make it unlikely that
+ * flow ids of several large flows hash to the same DSW-level flow.
+ * Such collisions will limit parallism and thus the number of cores
+ * that may be utilized. However, configuring a large number of DSW
+ * flows might potentially, depending on traffic and actual
+ * application flow id value range, result in each such DSW-level flow
+ * being very small. The effect of migrating such flows will be small,
+ * in terms amount of processing load redistributed. This will in turn
+ * reduce the load balancing speed, since flow migration rate has an
+ * upper limit. Code changes are required to allow > 32k DSW-level
+ * flows.
+ */
+#define DSW_MAX_FLOWS_BITS (13)
 #define DSW_MAX_FLOWS (1<<(DSW_MAX_FLOWS_BITS))
 #define DSW_MAX_FLOWS_MASK (DSW_MAX_FLOWS-1)
 
@@ -176,6 +187,14 @@ struct dsw_port {
        uint16_t seen_events_idx;
        struct dsw_queue_flow seen_events[DSW_MAX_EVENTS_RECORDED];
 
+       uint64_t new_enqueued;
+       uint64_t forward_enqueued;
+       uint64_t release_enqueued;
+       uint64_t queue_enqueued[DSW_MAX_QUEUES];
+
+       uint64_t dequeued;
+       uint64_t queue_dequeued[DSW_MAX_QUEUES];
+
        uint16_t out_buffer_len[DSW_MAX_PORTS];
        struct rte_event out_buffer[DSW_MAX_PORTS][DSW_MAX_PORT_OUT_BUFFER];
 
@@ -218,15 +237,12 @@ struct dsw_evdev {
 #define DSW_CTL_UNPAUS_REQ (1)
 #define DSW_CTL_CFM (2)
 
-/* sizeof(struct dsw_ctl_msg) must be equal or less than
- * sizeof(void *), to fit on the control ring.
- */
 struct dsw_ctl_msg {
-       uint8_t type:2;
-       uint8_t originating_port_id:6;
+       uint8_t type;
+       uint8_t originating_port_id;
        uint8_t queue_id;
        uint16_t flow_hash;
-} __rte_packed;
+} __rte_aligned(4);
 
 uint16_t dsw_event_enqueue(void *port, const struct rte_event *event);
 uint16_t dsw_event_enqueue_burst(void *port,
@@ -243,6 +259,17 @@ uint16_t dsw_event_dequeue(void *port, struct rte_event *ev, uint64_t wait);
 uint16_t dsw_event_dequeue_burst(void *port, struct rte_event *events,
                                 uint16_t num, uint64_t wait);
 
+int dsw_xstats_get_names(const struct rte_eventdev *dev,
+                        enum rte_event_dev_xstats_mode mode,
+                        uint8_t queue_port_id,
+                        struct rte_event_dev_xstats_name *xstats_names,
+                        unsigned int *ids, unsigned int size);
+int dsw_xstats_get(const struct rte_eventdev *dev,
+                  enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id,
+                  const unsigned int ids[], uint64_t values[], unsigned int n);
+uint64_t dsw_xstats_get_by_name(const struct rte_eventdev *dev,
+                               const char *name, unsigned int *id);
+
 static inline struct dsw_evdev *
 dsw_pmd_priv(const struct rte_eventdev *eventdev)
 {