ssows_swtag_untag(ws);
}
-__rte_always_inline uint16_t __hot
+__rte_always_inline uint16_t __rte_hot
ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks)
{
struct ssows *ws = port;
}
}
-__rte_always_inline uint16_t __hot
+__rte_always_inline uint16_t __rte_hot
ssows_deq_timeout(void *port, struct rte_event *ev, uint64_t timeout_ticks)
{
struct ssows *ws = port;
return ret;
}
-uint16_t __hot
+uint16_t __rte_hot
ssows_deq_burst(void *port, struct rte_event ev[], uint16_t nb_events,
uint64_t timeout_ticks)
{
return ssows_deq(port, ev, timeout_ticks);
}
-uint16_t __hot
+uint16_t __rte_hot
ssows_deq_timeout_burst(void *port, struct rte_event ev[], uint16_t nb_events,
uint64_t timeout_ticks)
{
return ssows_deq_timeout(port, ev, timeout_ticks);
}
-__rte_always_inline uint16_t __hot
+__rte_always_inline uint16_t __rte_hot
ssows_enq(void *port, const struct rte_event *ev)
{
struct ssows *ws = port;
return ret;
}
-uint16_t __hot
+uint16_t __rte_hot
ssows_enq_burst(void *port, const struct rte_event ev[], uint16_t nb_events)
{
RTE_SET_USED(nb_events);
return ssows_enq(port, ev);
}
-uint16_t __hot
+uint16_t __rte_hot
ssows_enq_new_burst(void *port, const struct rte_event ev[], uint16_t nb_events)
{
uint16_t i;
return nb_events;
}
-uint16_t __hot
+uint16_t __rte_hot
ssows_enq_fwd_burst(void *port, const struct rte_event ev[], uint16_t nb_events)
{
struct ssows *ws = port;
ssows_swtag_untag(ws);
}
}
+
+uint16_t
+sso_event_tx_adapter_enqueue(void *port,
+ struct rte_event ev[], uint16_t nb_events)
+{
+ uint16_t port_id;
+ uint16_t queue_id;
+ struct rte_mbuf *m;
+ struct rte_eth_dev *ethdev;
+ struct ssows *ws = port;
+ struct octeontx_txq *txq;
+ uint64_t cmd[4];
+
+ RTE_SET_USED(nb_events);
+ switch (ev->sched_type) {
+ case SSO_SYNC_ORDERED:
+ ssows_swtag_norm(ws, ev->event, SSO_SYNC_ATOMIC);
+ rte_cio_wmb();
+ ssows_swtag_wait(ws);
+ break;
+ case SSO_SYNC_UNTAGGED:
+ ssows_swtag_full(ws, ev->u64, ev->event, SSO_SYNC_ATOMIC,
+ ev->queue_id);
+ rte_cio_wmb();
+ ssows_swtag_wait(ws);
+ break;
+ case SSO_SYNC_ATOMIC:
+ rte_cio_wmb();
+ break;
+ }
+
+ m = ev[0].mbuf;
+ port_id = m->port;
+ queue_id = rte_event_eth_tx_adapter_txq_get(m);
+ ethdev = &rte_eth_devices[port_id];
+ txq = ethdev->data->tx_queues[queue_id];
+
+ return __octeontx_xmit_pkts(txq, &m, 1, cmd, OCCTX_TX_OFFLOAD_NONE);
+}