net/mlx5: fix chosen L3/L4 layer with tunnel

[dpdk.git] / drivers / event / octeontx / timvf_evdev.h

diff --git a/drivers/event/octeontx/timvf_evdev.h b/drivers/event/octeontx/timvf_evdev.h
index 01ffac0..d0e5921 100644 (file)
--- a/drivers/event/octeontx/timvf_evdev.h
+++ b/drivers/event/octeontx/timvf_evdev.h
@@ -1,5 +1,4 @@
-/*
- * SPDX-License-Identifier: BSD-3-Clause
+/* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2017 Cavium, Inc
  */
 
@@ -25,6 +24,7 @@
 #include <rte_reciprocal.h>
 
 #include <octeontx_mbox.h>
+#include <octeontx_fpavf.h>
 
 #define timvf_log(level, fmt, args...) \
        rte_log(RTE_LOG_ ## level, otx_logtype_timvf, \
@@ -115,11 +115,6 @@
 extern int otx_logtype_timvf;
 static const uint16_t nb_chunk_slots = (TIM_CHUNK_SIZE / 16) - 1;
 
-struct timvf_info {
-       uint16_t domain; /* Domain id */
-       uint8_t total_timvfs; /* Total timvf available in domain */
-};
-
 enum timvf_clk_src {
        TIM_CLK_SRC_SCLK = RTE_EVENT_TIMER_ADAPTER_CPU_CLK,
        TIM_CLK_SRC_GPIO = RTE_EVENT_TIMER_ADAPTER_EXT_CLK0,
@@ -144,7 +139,7 @@ struct tim_mem_bucket {
        };
        uint64_t current_chunk;
        uint64_t pad;
-} __rte_packed;
+} __rte_packed __rte_aligned(8);
 
 struct tim_mem_entry {
        uint64_t w0;
@@ -190,7 +185,14 @@ bkt_mod(const uint32_t rel_bkt, const uint32_t nb_bkts)
        return rel_bkt % nb_bkts;
 }
 
-int timvf_info(struct timvf_info *tinfo);
+static __rte_always_inline uint32_t
+bkt_and(uint32_t rel_bkt, uint32_t nb_bkts)
+{
+       return rel_bkt & (nb_bkts - 1);
+}
+
+uint8_t timvf_get_ring(void);
+void timvf_release_ring(uint8_t vfid);
 void *timvf_bar(uint8_t id, uint8_t bar);
 int timvf_timer_adapter_caps_get(const struct rte_eventdev *dev, uint64_t flags,
                uint32_t *caps, const struct rte_event_timer_adapter_ops **ops,
@@ -207,6 +209,13 @@ uint16_t timvf_timer_arm_burst_mp(const struct rte_event_timer_adapter *adptr,
 uint16_t timvf_timer_arm_burst_mp_stats(
                const struct rte_event_timer_adapter *adptr,
                struct rte_event_timer **tim, const uint16_t nb_timers);
-void timvf_set_chunk_refill(struct timvf_ring * const timr);
+uint16_t timvf_timer_arm_tmo_brst(const struct rte_event_timer_adapter *adptr,
+               struct rte_event_timer **tim, const uint64_t timeout_tick,
+               const uint16_t nb_timers);
+uint16_t timvf_timer_arm_tmo_brst_stats(
+               const struct rte_event_timer_adapter *adptr,
+               struct rte_event_timer **tim, const uint64_t timeout_tick,
+               const uint16_t nb_timers);
+void timvf_set_chunk_refill(struct timvf_ring * const timr, uint8_t use_fpa);
 
 #endif /* __TIMVF_EVDEV_H__ */