#include "otx2_evdev_stats.h"
#include "otx2_evdev.h"
#include "otx2_irq.h"
+#include "otx2_tim_evdev.h"
static inline int
sso_get_msix_offsets(const struct rte_eventdev *event_dev)
xaq_cnt = dev->nb_event_queues * OTX2_SSO_XAQ_CACHE_CNT;
if (dev->xae_cnt)
xaq_cnt += dev->xae_cnt / dev->xae_waes;
+ else if (dev->adptr_xae_cnt)
+ xaq_cnt += (dev->adptr_xae_cnt / dev->xae_waes) +
+ (OTX2_SSO_XAQ_SLACK * dev->nb_event_queues);
else
xaq_cnt += (dev->iue / dev->xae_waes) +
(OTX2_SSO_XAQ_SLACK * dev->nb_event_queues);
otx2_mbox_process(dev->mbox);
}
+int
+sso_xae_reconfigure(struct rte_eventdev *event_dev)
+{
+ struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
+ struct rte_mempool *prev_xaq_pool;
+ int rc = 0;
+
+ if (event_dev->data->dev_started)
+ sso_cleanup(event_dev, 0);
+
+ prev_xaq_pool = dev->xaq_pool;
+ dev->xaq_pool = NULL;
+ sso_xaq_allocate(dev);
+ rc = sso_ggrp_alloc_xaq(dev);
+ if (rc < 0) {
+ otx2_err("Failed to alloc xaq to ggrp %d", rc);
+ rte_mempool_free(prev_xaq_pool);
+ return rc;
+ }
+
+ rte_mempool_free(prev_xaq_pool);
+ rte_mb();
+ if (event_dev->data->dev_started)
+ sso_cleanup(event_dev, 1);
+
+ return 0;
+}
+
static int
otx2_sso_start(struct rte_eventdev *event_dev)
{
.port_unlink = otx2_sso_port_unlink,
.timeout_ticks = otx2_sso_timeout_ticks,
+ .eth_rx_adapter_caps_get = otx2_sso_rx_adapter_caps_get,
+ .eth_rx_adapter_queue_add = otx2_sso_rx_adapter_queue_add,
+ .eth_rx_adapter_queue_del = otx2_sso_rx_adapter_queue_del,
+
+ .timer_adapter_caps_get = otx2_tim_caps_get,
+
.xstats_get = otx2_sso_xstats_get,
.xstats_reset = otx2_sso_xstats_reset,
.xstats_get_names = otx2_sso_xstats_get_names,
.dev_start = otx2_sso_start,
.dev_stop = otx2_sso_stop,
.dev_close = otx2_sso_close,
+ .dev_selftest = otx2_sso_selftest,
};
#define OTX2_SSO_XAE_CNT "xae_cnt"
#define OTX2_SSO_SINGLE_WS "single_ws"
#define OTX2_SSO_GGRP_QOS "qos"
+#define OTX2_SSO_SELFTEST "selftest"
static void
parse_queue_param(char *value, void *opaque)
if (kvlist == NULL)
return;
+ rte_kvargs_process(kvlist, OTX2_SSO_SELFTEST, &parse_kvargs_flag,
+ &dev->selftest);
rte_kvargs_process(kvlist, OTX2_SSO_XAE_CNT, &parse_kvargs_value,
&dev->xae_cnt);
rte_kvargs_process(kvlist, OTX2_SSO_SINGLE_WS, &parse_kvargs_flag,
otx2_sso_dbg("Initializing %s max_queues=%d max_ports=%d",
event_dev->data->name, dev->max_event_queues,
dev->max_event_ports);
+ if (dev->selftest) {
+ event_dev->dev->driver = &pci_sso.driver;
+ event_dev->dev_ops->dev_selftest();
+ }
+ otx2_tim_init(pci_dev, (struct otx2_dev *)dev);
return 0;
return -EAGAIN;
}
+ otx2_tim_fini();
otx2_dev_fini(pci_dev, dev);
return 0;
RTE_PMD_REGISTER_KMOD_DEP(event_octeontx2, "vfio-pci");
RTE_PMD_REGISTER_PARAM_STRING(event_octeontx2, OTX2_SSO_XAE_CNT "=<int>"
OTX2_SSO_SINGLE_WS "=1"
- OTX2_SSO_GGRP_QOS "=<string>");
+ OTX2_SSO_GGRP_QOS "=<string>"
+ OTX2_SSO_SELFTEST "=1");