drivers/net: fix RSS hash offload flag if no RSS

[dpdk.git] / drivers / event / octeontx2 / otx2_evdev.c

diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index ca75e42..2daeba4 100644 (file)
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -168,6 +168,41 @@ SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
 #undef R
        };
 
+       /* Tx modes */
+       const event_tx_adapter_enqueue ssogws_tx_adptr_enq[2][2][2][2][2][2] = {
+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                     \
+               [f5][f4][f3][f2][f1][f0] =  otx2_ssogws_tx_adptr_enq_ ## name,
+SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
+#undef T
+       };
+
+       const event_tx_adapter_enqueue
+               ssogws_tx_adptr_enq_seg[2][2][2][2][2][2] = {
+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                     \
+               [f5][f4][f3][f2][f1][f0] =                              \
+                       otx2_ssogws_tx_adptr_enq_seg_ ## name,
+SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
+#undef T
+       };
+
+       const event_tx_adapter_enqueue
+               ssogws_dual_tx_adptr_enq[2][2][2][2][2][2] = {
+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                     \
+               [f5][f4][f3][f2][f1][f0] =                              \
+                       otx2_ssogws_dual_tx_adptr_enq_ ## name,
+SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
+#undef T
+       };
+
+       const event_tx_adapter_enqueue
+               ssogws_dual_tx_adptr_enq_seg[2][2][2][2][2][2] = {
+#define T(name, f5, f4, f3, f2, f1, f0, sz, flags)                     \
+               [f5][f4][f3][f2][f1][f0] =                              \
+                       otx2_ssogws_dual_tx_adptr_enq_seg_ ## name,
+SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
+#undef T
+       };
+
        event_dev->enqueue                      = otx2_ssogws_enq;
        event_dev->enqueue_burst                = otx2_ssogws_enq_burst;
        event_dev->enqueue_new_burst            = otx2_ssogws_enq_new_burst;
@@ -238,6 +273,25 @@ SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
                }
        }
 
+       if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {
+               /* [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */
+               event_dev->txa_enqueue = ssogws_tx_adptr_enq_seg
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
+       } else {
+               event_dev->txa_enqueue = ssogws_tx_adptr_enq
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
+                       [!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
+       }
+
        if (dev->dual_ws) {
                event_dev->enqueue              = otx2_ssogws_dual_enq;
                event_dev->enqueue_burst        = otx2_ssogws_dual_enq_burst;
@@ -352,7 +406,36 @@ SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
                                                        NIX_RX_OFFLOAD_RSS_F)];
                        }
                }
+
+               if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {
+               /* [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */
+                       event_dev->txa_enqueue = ssogws_dual_tx_adptr_enq_seg
+                               [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
+                               [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
+                               [!!(dev->tx_offloads &
+                                               NIX_TX_OFFLOAD_MBUF_NOFF_F)]
+                               [!!(dev->tx_offloads &
+                                               NIX_TX_OFFLOAD_VLAN_QINQ_F)]
+                               [!!(dev->tx_offloads &
+                                               NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
+                               [!!(dev->tx_offloads &
+                                               NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
+               } else {
+                       event_dev->txa_enqueue = ssogws_dual_tx_adptr_enq
+                               [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
+                               [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
+                               [!!(dev->tx_offloads &
+                                               NIX_TX_OFFLOAD_MBUF_NOFF_F)]
+                               [!!(dev->tx_offloads &
+                                               NIX_TX_OFFLOAD_VLAN_QINQ_F)]
+                               [!!(dev->tx_offloads &
+                                               NIX_TX_OFFLOAD_OL3_OL4_CSUM_F)]
+                               [!!(dev->tx_offloads &
+                                               NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
+               }
        }
+
+       event_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;
        rte_mb();
 }
 
@@ -1329,7 +1412,12 @@ sso_xae_reconfigure(struct rte_eventdev *event_dev)
 
        prev_xaq_pool = dev->xaq_pool;
        dev->xaq_pool = NULL;
-       sso_xaq_allocate(dev);
+       rc = sso_xaq_allocate(dev);
+       if (rc < 0) {
+               otx2_err("Failed to alloc xaq pool %d", rc);
+               rte_mempool_free(prev_xaq_pool);
+               return rc;
+       }
        rc = sso_ggrp_alloc_xaq(dev);
        if (rc < 0) {
                otx2_err("Failed to alloc xaq to ggrp %d", rc);
@@ -1413,6 +1501,10 @@ static struct rte_eventdev_ops otx2_sso_ops = {
        .eth_rx_adapter_start = otx2_sso_rx_adapter_start,
        .eth_rx_adapter_stop = otx2_sso_rx_adapter_stop,
 
+       .eth_tx_adapter_caps_get = otx2_sso_tx_adapter_caps_get,
+       .eth_tx_adapter_queue_add = otx2_sso_tx_adapter_queue_add,
+       .eth_tx_adapter_queue_del = otx2_sso_tx_adapter_queue_del,
+
        .timer_adapter_caps_get = otx2_tim_caps_get,
 
        .xstats_get       = otx2_sso_xstats_get,
@@ -1438,6 +1530,7 @@ parse_queue_param(char *value, void *opaque)
        uint8_t *val = (uint8_t *)&queue_qos;
        struct otx2_sso_evdev *dev = opaque;
        char *tok = strtok(value, "-");
+       struct otx2_sso_qos *old_ptr;
 
        if (!strlen(value))
                return;
@@ -1454,9 +1547,15 @@ parse_queue_param(char *value, void *opaque)
        }
 
        dev->qos_queue_cnt++;
+       old_ptr = dev->qos_parse_data;
        dev->qos_parse_data = rte_realloc(dev->qos_parse_data,
                                          sizeof(struct otx2_sso_qos) *
                                          dev->qos_queue_cnt, 0);
+       if (dev->qos_parse_data == NULL) {
+               dev->qos_parse_data = old_ptr;
+               dev->qos_queue_cnt--;
+               return;
+       }
        dev->qos_parse_data[dev->qos_queue_cnt - 1] = queue_qos;
 }
 
@@ -1474,7 +1573,7 @@ parse_qos_list(const char *value, void *opaque)
                else if (*s == ']')
                        end = s;
 
-               if (start < end && *start) {
+               if (start && start < end) {
                        *end = 0;
                        parse_queue_param(start + 1, opaque);
                        s = end;
@@ -1551,7 +1650,7 @@ static const struct rte_pci_id pci_sso_map[] = {
 
 static struct rte_pci_driver pci_sso = {
        .id_table = pci_sso_map,
-       .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
+       .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,
        .probe = otx2_sso_probe,
        .remove = otx2_sso_remove,
 };