{
struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
/* Single WS modes */
- const event_dequeue_t ssogws_deq[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_ ##name,
+ const event_dequeue_t ssogws_deq[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_burst_t ssogws_deq_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_burst_ ##name,
+ const event_dequeue_burst_t ssogws_deq_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_deq_timeout[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_timeout_ ##name,
+ const event_dequeue_t ssogws_deq_timeout[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_timeout_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
const event_dequeue_burst_t
- ssogws_deq_timeout_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = \
+ ssogws_deq_timeout_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
otx2_ssogws_deq_timeout_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_deq_seg[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_ ##name,
+ const event_dequeue_t ssogws_deq_seg[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_burst_t ssogws_deq_seg_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_burst_ ##name,
+ const event_dequeue_burst_t
+ ssogws_deq_seg_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_deq_seg_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_deq_seg_timeout[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_timeout_ ##name,
+ const event_dequeue_t ssogws_deq_seg_timeout[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_deq_seg_timeout_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
const event_dequeue_burst_t
- ssogws_deq_seg_timeout_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = \
+ ssogws_deq_seg_timeout_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
otx2_ssogws_deq_seg_timeout_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
/* Dual WS modes */
- const event_dequeue_t ssogws_dual_deq[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_ ##name,
+ const event_dequeue_t ssogws_dual_deq[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_burst_t ssogws_dual_deq_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_burst_ ##name,
+ const event_dequeue_burst_t
+ ssogws_dual_deq_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_dual_deq_timeout[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_timeout_ ##name,
+ const event_dequeue_t ssogws_dual_deq_timeout[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_timeout_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
const event_dequeue_burst_t
- ssogws_dual_deq_timeout_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_timeout_burst_ ##name,
+ ssogws_dual_deq_timeout_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_timeout_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_dual_deq_seg[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_seg_ ##name,
+ const event_dequeue_t ssogws_dual_deq_seg[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_seg_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
const event_dequeue_burst_t
- ssogws_dual_deq_seg_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = \
- otx2_ssogws_dual_deq_seg_burst_ ##name,
+ ssogws_dual_deq_seg_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_seg_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_dual_deq_seg_timeout[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = \
- otx2_ssogws_dual_deq_seg_timeout_ ##name,
+ const event_dequeue_t
+ ssogws_dual_deq_seg_timeout[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_seg_timeout_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
const event_dequeue_burst_t
- ssogws_dual_deq_seg_timeout_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = \
- otx2_ssogws_dual_deq_seg_timeout_burst_ ##name,
+ ssogws_dual_deq_seg_timeout_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_seg_timeout_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
/* Tx modes */
- const event_tx_adapter_enqueue ssogws_tx_adptr_enq[2][2][2][2][2] = {
-#define T(name, f4, f3, f2, f1, f0, sz, flags) \
- [f4][f3][f2][f1][f0] = otx2_ssogws_tx_adptr_enq_ ## name,
+ const event_tx_adapter_enqueue
+ ssogws_tx_adptr_enq[2][2][2][2][2][2][2] = {
+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_tx_adptr_enq_ ## name,
SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
#undef T
};
const event_tx_adapter_enqueue
- ssogws_tx_adptr_enq_seg[2][2][2][2][2] = {
-#define T(name, f4, f3, f2, f1, f0, sz, flags) \
- [f4][f3][f2][f1][f0] = otx2_ssogws_tx_adptr_enq_seg_ ## name,
+ ssogws_tx_adptr_enq_seg[2][2][2][2][2][2][2] = {
+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_tx_adptr_enq_seg_ ## name,
SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
#undef T
};
const event_tx_adapter_enqueue
- ssogws_dual_tx_adptr_enq[2][2][2][2][2] = {
-#define T(name, f4, f3, f2, f1, f0, sz, flags) \
- [f4][f3][f2][f1][f0] = otx2_ssogws_dual_tx_adptr_enq_ ## name,
+ ssogws_dual_tx_adptr_enq[2][2][2][2][2][2][2] = {
+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_tx_adptr_enq_ ## name,
SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
#undef T
};
const event_tx_adapter_enqueue
- ssogws_dual_tx_adptr_enq_seg[2][2][2][2][2] = {
-#define T(name, f4, f3, f2, f1, f0, sz, flags) \
- [f4][f3][f2][f1][f0] = \
+ ssogws_dual_tx_adptr_enq_seg[2][2][2][2][2][2][2] = {
+#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
otx2_ssogws_dual_tx_adptr_enq_seg_ ## name,
SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
#undef T
event_dev->enqueue_forward_burst = otx2_ssogws_enq_fwd_burst;
if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {
event_dev->dequeue = ssogws_deq_seg
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst = ssogws_deq_seg_burst
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
if (dev->is_timeout_deq) {
event_dev->dequeue = ssogws_deq_seg_timeout
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst =
ssogws_deq_seg_timeout_burst
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
}
} else {
event_dev->dequeue = ssogws_deq
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst = ssogws_deq_burst
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
if (dev->is_timeout_deq) {
event_dev->dequeue = ssogws_deq_timeout
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst =
ssogws_deq_timeout_burst
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
}
if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {
- /* [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */
+ /* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */
event_dev->txa_enqueue = ssogws_tx_adptr_enq_seg
+ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_SECURITY_F)]
+ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
[!!(dev->tx_offloads & NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
} else {
event_dev->txa_enqueue = ssogws_tx_adptr_enq
+ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_SECURITY_F)]
+ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
[!!(dev->tx_offloads & NIX_TX_OFFLOAD_MBUF_NOFF_F)]
[!!(dev->tx_offloads & NIX_TX_OFFLOAD_VLAN_QINQ_F)]
if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {
event_dev->dequeue = ssogws_dual_deq_seg
+ [!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst = ssogws_dual_deq_seg_burst
+ [!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_MARK_UPDATE_F)]
if (dev->is_timeout_deq) {
event_dev->dequeue =
ssogws_dual_deq_seg_timeout
+ [!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst =
ssogws_dual_deq_seg_timeout_burst
+ [!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
}
} else {
event_dev->dequeue = ssogws_dual_deq
+ [!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst = ssogws_dual_deq_burst
+ [!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
if (dev->is_timeout_deq) {
event_dev->dequeue =
ssogws_dual_deq_timeout
+ [!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst =
ssogws_dual_deq_timeout_burst
+ [!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
}
if (dev->tx_offloads & NIX_TX_MULTI_SEG_F) {
- /* [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */
+ /* [SEC] [TSMP] [MBUF_NOFF] [VLAN] [OL3_L4_CSUM] [L3_L4_CSUM] */
event_dev->txa_enqueue = ssogws_dual_tx_adptr_enq_seg
+ [!!(dev->tx_offloads &
+ NIX_TX_OFFLOAD_SECURITY_F)]
+ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
[!!(dev->tx_offloads &
NIX_TX_OFFLOAD_MBUF_NOFF_F)]
NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
} else {
event_dev->txa_enqueue = ssogws_dual_tx_adptr_enq
+ [!!(dev->tx_offloads &
+ NIX_TX_OFFLOAD_SECURITY_F)]
+ [!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSO_F)]
[!!(dev->tx_offloads & NIX_TX_OFFLOAD_TSTAMP_F)]
[!!(dev->tx_offloads &
NIX_TX_OFFLOAD_MBUF_NOFF_F)]
NIX_TX_OFFLOAD_L3_L4_CSUM_F)];
}
}
+
+ event_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;
rte_mb();
}