/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016 NXP
+ * Copyright 2016-2019 NXP
*
*/
struct dpaa2_bp_info *rte_dpaa2_bpid_info;
static struct dpaa2_bp_list *h_bp_list;
-/* Dynamic logging identified for mempool */
-int dpaa2_logtype_mempool;
-
static int
rte_hw_mbuf_create_pool(struct rte_mempool *mp)
{
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret) {
- DPAA2_MEMPOOL_ERR("Failure in affining portal");
+ DPAA2_MEMPOOL_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
goto err1;
}
}
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret != 0) {
- DPAA2_MEMPOOL_ERR("Failed to allocate IO portal");
+ DPAA2_MEMPOOL_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
return;
}
}
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret != 0) {
- DPAA2_MEMPOOL_ERR("Failed to allocate IO portal");
+ DPAA2_MEMPOOL_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
return ret;
}
}
/* Insert entry into the PA->VA Table */
dpaax_iova_table_update(paddr, vaddr, len);
- return rte_mempool_op_populate_default(mp, max_objs, vaddr, paddr, len,
- obj_cb, obj_cb_arg);
+ return rte_mempool_op_populate_helper(mp, 0, max_objs, vaddr, paddr,
+ len, obj_cb, obj_cb_arg);
}
static const struct rte_mempool_ops dpaa2_mpool_ops = {
MEMPOOL_REGISTER_OPS(dpaa2_mpool_ops);
-RTE_INIT(dpaa2_mempool_init_log)
-{
- dpaa2_logtype_mempool = rte_log_register("mempool.dpaa2");
- if (dpaa2_logtype_mempool >= 0)
- rte_log_set_level(dpaa2_logtype_mempool, RTE_LOG_NOTICE);
-}
+RTE_LOG_REGISTER(dpaa2_logtype_mempool, mempool.dpaa2, NOTICE);