net/axgbe: add a HW quirk for register definitions

[dpdk.git] / drivers / net / axgbe / axgbe_common.h

diff --git a/drivers/net/axgbe/axgbe_common.h b/drivers/net/axgbe/axgbe_common.h
index 97a80f595c93be2d838bc57961700fbe3da2ee96..fdb037dd5a8da9737f0f09e25efddedbee484a07 100644 (file)
--- a/drivers/net/axgbe/axgbe_common.h
+++ b/drivers/net/axgbe/axgbe_common.h
@@ -34,7 +34,6 @@
 #include <rte_ethdev.h>
 #include <rte_dev.h>
 #include <rte_errno.h>
-#include <rte_dev.h>
 #include <rte_ethdev_pci.h>
 #include <rte_common.h>
 #include <rte_cycles.h>
@@ -842,6 +841,8 @@
 #define PCS_V1_WINDOW_SELECT           0x03fc
 #define PCS_V2_WINDOW_DEF              0x9060
 #define PCS_V2_WINDOW_SELECT           0x9064
+#define PCS_V2_RV_WINDOW_DEF           0x1060
+#define PCS_V2_RV_WINDOW_SELECT                0x1064
 
 /* PCS register entry bit positions and sizes */
 #define PCS_V2_WINDOW_DEF_OFFSET_INDEX 6
@@ -1297,6 +1298,7 @@
 #define AXGBE_AN_CL37_PCS_MODE_BASEX   0x00
 #define AXGBE_AN_CL37_PCS_MODE_SGMII   0x04
 #define AXGBE_AN_CL37_TX_CONFIG_MASK   0x08
+#define AXGBE_AN_CL37_MII_CTRL_8BIT     0x0100
 
 #define AXGBE_PMA_CDR_TRACK_EN_MASK    0x01
 #define AXGBE_PMA_CDR_TRACK_EN_OFF     0x00
@@ -1352,9 +1354,9 @@ do {                                                                      \
 
 #define SET_BITS_LE(_var, _index, _width, _val)                                \
 do {                                                                   \
-       (_var) &= rte_cpu_to_le_32(~(((0x1 << (_width)) - 1) << (_index)));\
+       (_var) &= rte_cpu_to_le_32(~(((0x1U << (_width)) - 1) << (_index)));\
        (_var) |= rte_cpu_to_le_32((((_val) &                           \
-                             ((0x1 << (_width)) - 1)) << (_index)));   \
+                             ((0x1U << (_width)) - 1)) << (_index)));  \
 } while (0)
 
 /* Bit setting and getting macros based on register fields