ethdev: reset all when releasing a port

[dpdk.git] / drivers / net / axgbe / axgbe_ethdev.h

diff --git a/drivers/net/axgbe/axgbe_ethdev.h b/drivers/net/axgbe/axgbe_ethdev.h
index f10ec4a..35a8476 100644 (file)
--- a/drivers/net/axgbe/axgbe_ethdev.h
+++ b/drivers/net/axgbe/axgbe_ethdev.h
@@ -9,6 +9,7 @@
 #include <rte_mempool.h>
 #include <rte_lcore.h>
 #include "axgbe_common.h"
+#include "rte_time.h"
 
 #define IRQ                            0xff
 #define VLAN_HLEN                      4
@@ -63,6 +64,13 @@
 #define AXGBE_V2_DMA_CLOCK_FREQ                500000000
 #define AXGBE_V2_PTP_CLOCK_FREQ                125000000
 
+/* Timestamp support - values based on 50MHz PTP clock
+ *   50MHz => 20 nsec
+ */
+#define AXGBE_TSTAMP_SSINC       20
+#define AXGBE_TSTAMP_SNSINC      0
+#define AXGBE_CYCLECOUNTER_MASK 0xffffffffffffffffULL
+
 #define AXGMAC_FIFO_MIN_ALLOC          2048
 #define AXGMAC_FIFO_UNIT               256
 #define AXGMAC_FIFO_ALIGN(_x)                            \
@@ -522,7 +530,7 @@ struct axgbe_port {
        unsigned int xpcs_window_mask;
 
        /* Flags representing axgbe_state */
-       unsigned long dev_state;
+       uint32_t dev_state;
 
        struct axgbe_hw_if hw_if;
        struct axgbe_phy_if phy_if;
@@ -594,6 +602,7 @@ struct axgbe_port {
        uint32_t rss_table[AXGBE_RSS_MAX_TABLE_SIZE];
        uint32_t rss_options;
        int rss_enable;
+       uint64_t rss_hf;
 
        /* Hardware features of the device */
        struct axgbe_hw_features hw_feat;
@@ -644,6 +653,12 @@ struct axgbe_port {
        unsigned int hash_table_count;
        unsigned int uc_hash_mac_addr;
        unsigned int uc_hash_table[AXGBE_MAC_HASH_TABLE_SIZE];
+
+       /* For IEEE1588 PTP */
+       struct rte_timecounter systime_tc;
+       struct rte_timecounter tx_tstamp;
+       unsigned int tstamp_addend;
+
 };
 
 void axgbe_init_function_ptrs_dev(struct axgbe_hw_if *hw_if);
@@ -653,5 +668,7 @@ void axgbe_init_function_ptrs_i2c(struct axgbe_i2c_if *i2c_if);
 void axgbe_set_mac_addn_addr(struct axgbe_port *pdata, u8 *addr,
                             uint32_t index);
 void axgbe_set_mac_hash_table(struct axgbe_port *pdata, u8 *addr, bool add);
+int axgbe_write_rss_lookup_table(struct axgbe_port *pdata);
+int axgbe_write_rss_hash_key(struct axgbe_port *pdata);
 
 #endif /* RTE_ETH_AXGBE_H_ */