unsigned int xpcs_window_mask;
/* Flags representing axgbe_state */
- unsigned long dev_state;
+ uint32_t dev_state;
struct axgbe_hw_if hw_if;
struct axgbe_phy_if phy_if;
unsigned int rx_rfa[AXGBE_MAX_QUEUES];
unsigned int rx_rfd[AXGBE_MAX_QUEUES];
unsigned int fifo;
+ unsigned int pfc_map[AXGBE_MAX_QUEUES];
/* Receive Side Scaling settings */
u8 rss_key[AXGBE_RSS_HASH_KEY_SIZE];
uint32_t rss_table[AXGBE_RSS_MAX_TABLE_SIZE];
uint32_t rss_options;
int rss_enable;
+ uint64_t rss_hf;
/* Hardware features of the device */
struct axgbe_hw_features hw_feat;
void axgbe_set_mac_addn_addr(struct axgbe_port *pdata, u8 *addr,
uint32_t index);
void axgbe_set_mac_hash_table(struct axgbe_port *pdata, u8 *addr, bool add);
+int axgbe_write_rss_lookup_table(struct axgbe_port *pdata);
+int axgbe_write_rss_hash_key(struct axgbe_port *pdata);
#endif /* RTE_ETH_AXGBE_H_ */