/* Ring physical address */
uint64_t ring_phys_addr;
/* Dma Channel register address */
- uint64_t dma_regs;
+ void *dma_regs;
/* Dma channel tail register address*/
volatile uint32_t *dma_tail_reg;
/* DPDK queue index */
uint64_t pkts;
uint64_t bytes;
uint64_t errors;
+ uint64_t rx_mbuf_alloc_failed;
/* Number of mbufs allocated from pool*/
uint64_t mbuf_alloc;
-} ____cacheline_aligned;
+} __rte_cache_aligned;
/*Tx descriptor format */
struct axgbe_tx_desc {
/* Physical address of ring */
uint64_t ring_phys_addr;
/* Dma channel register space */
- uint64_t dma_regs;
+ void *dma_regs;
/* Dma tail register address of ring*/
volatile uint32_t *dma_tail_reg;
/* Tx queue index/id*/