#define BNX2X_PMD_VER_PREFIX "BNX2X PMD"
#define BNX2X_PMD_VERSION_MAJOR 1
#define BNX2X_PMD_VERSION_MINOR 0
-#define BNX2X_PMD_VERSION_REVISION 1
+#define BNX2X_PMD_VERSION_REVISION 5
#define BNX2X_PMD_VERSION_PATCH 1
static inline const char *
static void bnx2x_free_mem(struct bnx2x_softc *sc);
static int bnx2x_alloc_fw_stats_mem(struct bnx2x_softc *sc);
static void bnx2x_free_fw_stats_mem(struct bnx2x_softc *sc);
-static __attribute__ ((noinline))
+static __rte_noinline
int bnx2x_nic_load(struct bnx2x_softc *sc);
static int bnx2x_handle_sp_tq(struct bnx2x_softc *sc);
/* Caller must take care that strlen(mz_name) < RTE_MEMZONE_NAMESIZE */
z = rte_memzone_reserve_aligned(mz_name, (uint64_t) (size),
- rte_lcore_to_socket_id(rte_lcore_id()),
+ SOCKET_ID_ANY,
0, align);
if (z == NULL) {
PMD_DRV_LOG(ERR, "DMA alloc failed for %s", msg);
return -ENOMEM;
}
- dma->paddr = (uint64_t) z->phys_addr;
+ dma->paddr = (uint64_t) z->iova;
dma->vaddr = z->addr;
PMD_DRV_LOG(DEBUG, "%s: virt=%p phys=%" PRIx64, msg, dma->vaddr, dma->paddr);
/*
* Post a slowpath command.
*
- * A slowpath command is used to propogate a configuration change through
+ * A slowpath command is used to propagate a configuration change through
* the controller in a controlled manner, allowing each STORM processor and
* other H/W blocks to phase in the change. The commands sent on the
* slowpath are referred to as ramrods. Depending on the ramrod used the
return rc;
}
-int
+static int
bnx2x_fill_accept_flags(struct bnx2x_softc *sc, uint32_t rx_mode,
- unsigned long *rx_accept_flags,
- unsigned long *tx_accept_flags)
+ unsigned long *rx_accept_flags,
+ unsigned long *tx_accept_flags)
{
/* Clear the flags first */
*rx_accept_flags = 0;
break;
+ case BNX2X_RX_MODE_ALLMULTI_PROMISC:
case BNX2X_RX_MODE_PROMISC:
/*
* According to deffinition of SI mode, iface in promisc mode
}
/* stop the controller */
-__attribute__ ((noinline))
+__rte_noinline
int
bnx2x_nic_unload(struct bnx2x_softc *sc, uint32_t unload_mode, uint8_t keep_link)
{
/*
* Nothing to do during unload if previous bnx2x_nic_load()
- * did not completed succesfully - all resourses are released.
+ * did not completed successfully - all resourses are released.
*/
if ((sc->state == BNX2X_STATE_CLOSED) || (sc->state == BNX2X_STATE_ERROR)) {
return 0;
tx_start_bd = &txq->tx_ring[TX_BD(bd_prod, txq)].start_bd;
tx_start_bd->addr =
- rte_cpu_to_le_64(rte_mbuf_data_dma_addr(m0));
+ rte_cpu_to_le_64(rte_mbuf_data_iova(m0));
tx_start_bd->nbytes = rte_cpu_to_le_16(m0->data_len);
tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
tx_start_bd->general_data =
}
PMD_TX_LOG(DEBUG,
- "start bd: nbytes %d flags %x vlan %x\n",
+ "start bd: nbytes %d flags %x vlan %x",
tx_start_bd->nbytes,
tx_start_bd->bd_flags.as_bitfield,
tx_start_bd->vlan_or_ethertype);
mask1 = REG_RD(sc, PXP2_REG_PXP2_INT_MASK_1);
val0 = REG_RD(sc, PXP2_REG_PXP2_INT_STS_0);
/*
- * If the olny PXP2_EOP_ERROR_BIT is set in
+ * If the only PXP2_EOP_ERROR_BIT is set in
* STS0 and STS1 - clear it
*
* probably we lose additional attentions between
(val | HC_CONFIG_0_REG_BLOCK_DISABLE_0));
} else {
-/* Prevent incomming interrupts in IGU */
+/* Prevent incoming interrupts in IGU */
val = REG_RD(sc, IGU_REG_BLOCK_CONFIGURATION);
if (close)
/* Hash bits */
params.rss_result_mask = MULTI_MASK;
- (void)rte_memcpy(params.ind_table, rss_obj->ind_table,
+ rte_memcpy(params.ind_table, rss_obj->ind_table,
sizeof(params.ind_table));
if (config_hash) {
/* fill a user request section if needed */
if (!bnx2x_test_bit(RAMROD_CONT, ramrod_flags)) {
- (void)rte_memcpy(ramrod_param.user_req.u.mac.mac, mac,
+ rte_memcpy(ramrod_param.user_req.u.mac.mac, mac,
ETH_ALEN);
bnx2x_set_bit(mac_type, &ramrod_param.user_req.vlan_mac_flags);
sc->link_cnt++;
/* report new link params and remember the state for the next time */
- (void)rte_memcpy(&sc->last_reported_link, &cur_data, sizeof(cur_data));
+ rte_memcpy(&sc->last_reported_link, &cur_data, sizeof(cur_data));
if (bnx2x_test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
&cur_data.link_report_flags)) {
bnx2x_set_requested_fc(sc);
- if (CHIP_REV_IS_SLOW(sc)) {
- uint32_t bond = CHIP_BOND_ID(sc);
- uint32_t feat = 0;
-
- if (CHIP_IS_E2(sc) && CHIP_IS_MODE_4_PORT(sc)) {
- feat |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_BMAC;
- } else if (bond & 0x4) {
- if (CHIP_IS_E3(sc)) {
- feat |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_XMAC;
- } else {
- feat |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_BMAC;
- }
- } else if (bond & 0x8) {
- if (CHIP_IS_E3(sc)) {
- feat |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_UMAC;
- } else {
- feat |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_EMAC;
- }
- }
-
-/* disable EMAC for E3 and above */
- if (bond & 0x2) {
- feat |= ELINK_FEATURE_CONFIG_EMUL_DISABLE_EMAC;
- }
-
- sc->link_params.feature_config_flags |= feat;
- }
-
if (load_mode == LOAD_DIAG) {
lp->loopback_mode = ELINK_LOOPBACK_XGXS;
/* Prefer doing PHY loopback at 10G speed, if possible */
}
/* start the controller */
-static __attribute__ ((noinline))
+static __rte_noinline
int bnx2x_nic_load(struct bnx2x_softc *sc)
{
uint32_t val;
sc->max_rx_queues = min(BNX2X_VF_MAX_QUEUES_PER_VF,
sc->igu_sb_cnt);
} else {
- sc->max_tx_queues = 128;
- sc->max_rx_queues = 128;
+ sc->max_rx_queues = BNX2X_MAX_RSS_COUNT(sc);
+ sc->max_tx_queues = sc->max_rx_queues;
}
}
git.droids-corp.org / dpdk.git / blobdiff