tx_parse_bd =
&txq->tx_ring[TX_BD(bd_prod, txq)].parse_bd_e2;
- if (is_multicast_ether_addr(&eh->d_addr)) {
- if (is_broadcast_ether_addr(&eh->d_addr))
+ if (rte_is_multicast_ether_addr(&eh->d_addr)) {
+ if (rte_is_broadcast_ether_addr(&eh->d_addr))
mac_type = BROADCAST_ADDRESS;
else
mac_type = MULTICAST_ADDRESS;
ecore_ilt_mem_op(sc, ILT_MEMOP_FREE);
bnx2x_free_ilt_lines_mem(sc);
+
+ /* free the host hardware/software hsi structures */
+ bnx2x_free_hsi_mem(sc);
}
static int bnx2x_alloc_mem(struct bnx2x_softc *sc)
return -1;
}
+ /* allocate the host hardware/software hsi structures */
+ if (bnx2x_alloc_hsi_mem(sc) != 0) {
+ PMD_DRV_LOG(ERR, sc, "bnx2x_alloc_hsi_mem was failed");
+ bnx2x_free_mem(sc);
+ return -ENXIO;
+ }
+
return 0;
}
}
}
+ /* Assuming we have completed slow path completion, clear the flag */
+ rte_atomic32_set(&sc->scan_fp, 0);
bnx2x_ack_sb(sc, fp->igu_sb_id, USTORM_ID,
le16toh(fp->fp_hc_idx), IGU_INT_ENABLE, 1);
}
/*******************/
memset(&fp->status_block, 0, sizeof(fp->status_block));
+ bnx2x_dma_free(&fp->sb_dma);
}
/***************************/
/* FW DECOMPRESSION BUFFER */
/***************************/
+ bnx2x_dma_free(&sc->gz_buf_dma);
sc->gz_buf = NULL;
/*******************/
/* SLOW PATH QUEUE */
/*******************/
+ bnx2x_dma_free(&sc->spq_dma);
sc->spq = NULL;
/*************/
/* SLOW PATH */
/*************/
+ bnx2x_dma_free(&sc->sp_dma);
sc->sp = NULL;
/***************/
/* EVENT QUEUE */
/***************/
+ bnx2x_dma_free(&sc->eq_dma);
sc->eq = NULL;
/************************/
/* DEFAULT STATUS BLOCK */
/************************/
+ bnx2x_dma_free(&sc->def_sb_dma);
sc->def_sb = NULL;
}
bnx2x_get_phy_info(sc);
} else {
/* Left mac of VF unfilled, PF should set it for VF */
- memset(sc->link_params.mac_addr, 0, ETHER_ADDR_LEN);
+ memset(sc->link_params.mac_addr, 0, RTE_ETHER_ADDR_LEN);
}
sc->wol = 0;
/* set the default MTU (changed via ifconfig) */
- sc->mtu = ETHER_MTU;
+ sc->mtu = RTE_ETHER_MTU;
bnx2x_set_modes_bitmap(sc);