#define BNX2X_PMD_VER_PREFIX "BNX2X PMD"
#define BNX2X_PMD_VERSION_MAJOR 1
-#define BNX2X_PMD_VERSION_MINOR 0
-#define BNX2X_PMD_VERSION_REVISION 7
+#define BNX2X_PMD_VERSION_MINOR 1
+#define BNX2X_PMD_VERSION_REVISION 0
#define BNX2X_PMD_VERSION_PATCH 1
static inline const char *
tx_start_bd = &txq->tx_ring[TX_BD(bd_prod, txq)].start_bd;
- tx_start_bd->addr =
- rte_cpu_to_le_64(rte_mbuf_data_iova(m0));
+ tx_start_bd->addr_lo =
+ rte_cpu_to_le_32(U64_LO(rte_mbuf_data_iova(m0)));
+ tx_start_bd->addr_hi =
+ rte_cpu_to_le_32(U64_HI(rte_mbuf_data_iova(m0)));
tx_start_bd->nbytes = rte_cpu_to_le_16(m0->data_len);
tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
tx_start_bd->general_data =
bnx2x_update_rx_prod(struct bnx2x_softc *sc, struct bnx2x_fastpath *fp,
uint16_t rx_bd_prod, uint16_t rx_cq_prod)
{
- union ustorm_eth_rx_producers rx_prods;
+ struct ustorm_eth_rx_producers rx_prods;
uint32_t i;
+ memset(&rx_prods, 0, sizeof(rx_prods));
+
/* update producers */
- rx_prods.prod.bd_prod = rx_bd_prod;
- rx_prods.prod.cqe_prod = rx_cq_prod;
- rx_prods.prod.reserved = 0;
+ rx_prods.bd_prod = rx_bd_prod;
+ rx_prods.cqe_prod = rx_cq_prod;
/*
* Make sure that the BD and SGE data is updated before updating the
wmb();
for (i = 0; i < (sizeof(rx_prods) / 4); i++) {
- REG_WR(sc,
- (fp->ustorm_rx_prods_offset + (i * 4)),
- rx_prods.raw_data[i]);
+ REG_WR(sc, (fp->ustorm_rx_prods_offset + (i * 4)),
+ ((uint32_t *)&rx_prods)[i]);
}
wmb(); /* keep prod updates ordered */
{
int i;
- if (IS_MF_SI(sc)) {
-/*
- * In switch independent mode, the TSTORM needs to accept
- * packets that failed classification, since approximate match
- * mac addresses aren't written to NIG LLH.
- */
- REG_WR8(sc,
- (BAR_TSTRORM_INTMEM +
- TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET), 2);
- } else
- REG_WR8(sc,
- (BAR_TSTRORM_INTMEM +
- TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET), 0);
-
/*
* Zero this manually as its initialization is currently missing
* in the initTool.
VNICS_PER_PATH(sc));
/* RSS configuration object */
- ecore_init_rss_config_obj(&sc->rss_conf_obj,
- sc->fp[0].cl_id,
- sc->fp[0].index,
- SC_FUNC(sc),
- SC_FUNC(sc),
+ ecore_init_rss_config_obj(sc, &sc->rss_conf_obj, sc->fp->cl_id,
+ sc->fp->index, SC_FUNC(sc), SC_FUNC(sc),
BNX2X_SP(sc, rss_rdata),
(rte_iova_t)BNX2X_SP_MAPPING(sc, rss_rdata),
- ECORE_FILTER_RSS_CONF_PENDING,
- &sc->sp_state, ECORE_OBJ_TYPE_RX);
+ ECORE_FILTER_RSS_CONF_PENDING, &sc->sp_state,
+ ECORE_OBJ_TYPE_RX);
}
/*
start_params->network_cos_mode = FW_WRR;
}
- start_params->gre_tunnel_mode = 0;
- start_params->gre_tunnel_rss = 0;
-
return ecore_func_state_change(sc, &func_params);
}
return -ENOMEM;
}
-#ifndef __FreeBSD__
+#ifndef RTE_EXEC_ENV_FREEBSD
pci_read(sc, PCI_STATUS, &status, 2);
if (!(status & PCI_STATUS_CAP_LIST)) {
#else
return -1;
}
-#ifndef __FreeBSD__
+#ifndef RTE_EXEC_ENV_FREEBSD
pci_read(sc, PCI_CAPABILITY_LIST, &pci_cap.next, 1);
#else
pci_read(sc, PCIR_CAP_PTR, &pci_cap.next, 1);
}
#define FW_HEADER_LEN 104
-#define FW_NAME_57711 "/lib/firmware/bnx2x/bnx2x-e1h-7.2.51.0.fw"
-#define FW_NAME_57810 "/lib/firmware/bnx2x/bnx2x-e2-7.2.51.0.fw"
+#define FW_NAME_57711 "/lib/firmware/bnx2x/bnx2x-e1h-7.13.11.0.fw"
+#define FW_NAME_57810 "/lib/firmware/bnx2x/bnx2x-e2-7.13.11.0.fw"
void bnx2x_load_firmware(struct bnx2x_softc *sc)
{
/* clean the DMAE memory */
sc->dmae_ready = 1;
- ecore_init_fill(sc, TSEM_REG_PRAM, 0, 8);
+ ecore_init_fill(sc, TSEM_REG_PRAM, 0, 8, 1);
ecore_init_block(sc, BLOCK_TCM, PHASE_COMMON);
ilt_cli.end = ILT_NUM_PAGE_ENTRIES - 1;
ilt_cli.client_num = ILT_CLIENT_TM;
- ecore_ilt_boundry_init_op(sc, &ilt_cli, 0);
+ ecore_ilt_boundary_init_op(sc, &ilt_cli, 0, INITOP_CLEAR);
}
/* this assumes that reset_port() called before reset_func() */