net/i40e/base: add send ASQ command v2 functions

[dpdk.git] / drivers / net / bnx2x / bnx2x.h

diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h
index 1ea8b55..80d19cb 100644 (file)
--- a/drivers/net/bnx2x/bnx2x.h
+++ b/drivers/net/bnx2x/bnx2x.h
@@ -19,18 +19,7 @@
 #include <rte_bus_pci.h>
 #include <rte_io.h>
 
-#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
-#ifndef __LITTLE_ENDIAN
-#define __LITTLE_ENDIAN RTE_LITTLE_ENDIAN
-#endif
-#undef __BIG_ENDIAN
-#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
-#ifndef __BIG_ENDIAN
-#define __BIG_ENDIAN    RTE_BIG_ENDIAN
-#endif
-#undef __LITTLE_ENDIAN
-#endif
-
+#include "bnx2x_osal.h"
 #include "bnx2x_ethdev.h"
 #include "ecore_mfw_req.h"
 #include "ecore_fw_defs.h"
@@ -41,7 +30,7 @@
 
 #include "elink.h"
 
-#ifndef __FreeBSD__
+#ifndef RTE_EXEC_ENV_FREEBSD
 #include <linux/pci_regs.h>
 
 #define PCIY_PMG                       PCI_CAP_ID_PM
@@ -71,7 +60,7 @@
 #define IFM_10G_TWINAX                 22 /* 10GBase Twinax copper */
 #define IFM_10G_T                      26 /* 10GBase-T - RJ45 */
 
-#ifndef __FreeBSD__
+#ifndef RTE_EXEC_ENV_FREEBSD
 #define PCIR_EXPRESS_DEVICE_STA        PCI_EXP_TYPE_RC_EC
 #define PCIM_EXP_STA_TRANSACTION_PND   PCI_EXP_DEVSTA_TRPND
 #define PCIR_EXPRESS_LINK_STA          PCI_EXP_LNKSTA
@@ -92,10 +81,7 @@
 #endif
 
 #ifndef ARRAY_SIZE
-#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
-#endif
-#ifndef ARRSIZE
-#define ARRSIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
+#define ARRAY_SIZE(arr) RTE_DIM(arr)
 #endif
 #ifndef DIV_ROUND_UP
 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
@@ -374,6 +360,9 @@ struct bnx2x_fastpath {
        /* pointer back to parent structure */
        struct bnx2x_softc *sc;
 
+       /* Used to synchronize fastpath Rx access */
+       rte_spinlock_t rx_mtx;
+
        /* status block */
        struct bnx2x_dma                 sb_dma;
        union bnx2x_host_hc_status_block status_block;
@@ -1011,8 +1000,8 @@ struct bnx2x_sp_objs {
  * link parameters twice.
  */
 struct bnx2x_link_report_data {
-       uint16_t      line_speed;        /* Effective line speed */
-       unsigned long link_report_flags; /* BNX2X_LINK_REPORT_XXX flags */
+       uint16_t line_speed;        /* Effective line speed */
+       uint32_t link_report_flags; /* BNX2X_LINK_REPORT_XXX flags */
 };
 
 enum {
@@ -1031,6 +1020,8 @@ struct bnx2x_pci_cap {
        uint16_t addr;
 };
 
+struct ecore_ilt;
+
 struct bnx2x_vfdb;
 
 /* Top level device private data structure. */
@@ -1241,7 +1232,7 @@ struct bnx2x_softc {
        /* slow path */
        struct bnx2x_dma      sp_dma;
        struct bnx2x_slowpath *sp;
-       unsigned long       sp_state;
+       uint32_t            sp_state;
 
        /* slow path queue */
        struct bnx2x_dma spq_dma;
@@ -1385,6 +1376,10 @@ struct bnx2x_softc {
        uint8_t prio_to_cos[BNX2X_MAX_PRIORITY];
 
        int panic;
+       /* Array of Multicast addrs */
+       struct rte_ether_addr mc_addrs[VF_MAX_MULTICAST_PER_VF];
+       /* Multicast mac addresses number */
+       uint16_t mc_addrs_num;
 }; /* struct bnx2x_softc */
 
 /* IOCTL sub-commands for edebug and firmware upgrade */
@@ -1821,10 +1816,6 @@ static const uint32_t dmae_reg_go_c[] = {
 #define PCI_PM_D0    1
 #define PCI_PM_D3hot 2
 
-int  bnx2x_test_bit(int nr, volatile unsigned long * addr);
-void bnx2x_set_bit(unsigned int nr, volatile unsigned long * addr);
-void bnx2x_clear_bit(int nr, volatile unsigned long * addr);
-int  bnx2x_test_and_clear_bit(int nr, volatile unsigned long * addr);
 int  bnx2x_cmpxchg(volatile int *addr, int old, int new);
 
 int bnx2x_dma_alloc(struct bnx2x_softc *sc, size_t size,
@@ -1911,16 +1902,19 @@ bnx2x_hc_ack_sb(struct bnx2x_softc *sc, uint8_t sb_id, uint8_t storm,
 {
        uint32_t hc_addr = (HC_REG_COMMAND_REG + SC_PORT(sc) * 32 +
                        COMMAND_REG_INT_ACK);
-       union igu_ack_register igu_ack;
+       union {
+               struct igu_ack_register igu_ack;
+               uint32_t val;
+       } val;
 
-       igu_ack.sb.status_block_index = index;
-       igu_ack.sb.sb_id_and_flags =
+       val.igu_ack.status_block_index = index;
+       val.igu_ack.sb_id_and_flags =
                ((sb_id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
                 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
                 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
                 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
 
-       REG_WR(sc, hc_addr, igu_ack.raw_data);
+       REG_WR(sc, hc_addr, val.val);
 
        /* Make sure that ACK is written */
        mb();