net/dpaa2: support Rx buffer size

[dpdk.git] / drivers / net / bnxt / bnxt.h

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index 8374e9f..b4370e5 100644 (file)
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2014-2018 Broadcom
+ * Copyright(c) 2014-2021 Broadcom
  * All rights reserved.
  */
 
@@ -12,7 +12,7 @@
 
 #include <rte_pci.h>
 #include <rte_bus_pci.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
 #include <rte_memory.h>
 #include <rte_lcore.h>
 #include <rte_spinlock.h>
@@ -66,6 +66,10 @@
 #define BROADCOM_DEV_ID_58804          0xd804
 #define BROADCOM_DEV_ID_58808          0x16f0
 #define BROADCOM_DEV_ID_58802_VF       0xd800
+#define BROADCOM_DEV_ID_58812          0xd812
+#define BROADCOM_DEV_ID_58814          0xd814
+#define BROADCOM_DEV_ID_58818          0xd818
+#define BROADCOM_DEV_ID_58818_VF       0xd82e
 
 #define BROADCOM_DEV_957508_N2100      0x5208
 #define IS_BNXT_DEV_957508_N2100(bp)   \
@@ -367,14 +371,20 @@ struct bnxt_coal {
 };
 
 /* 64-bit doorbell */
+#define DBR_EPOCH_MASK                         0x01000000UL
+#define DBR_EPOCH_SFT                          24
 #define DBR_XID_SFT                            32
 #define DBR_PATH_L2                            (0x1ULL << 56)
+#define DBR_VALID                              (0x1ULL << 58)
 #define DBR_TYPE_SQ                            (0x0ULL << 60)
 #define DBR_TYPE_SRQ                           (0x2ULL << 60)
 #define DBR_TYPE_CQ                            (0x4ULL << 60)
 #define DBR_TYPE_NQ                            (0xaULL << 60)
 #define DBR_TYPE_NQ_ARM                                (0xbULL << 60)
 
+#define DB_PF_OFFSET                   0x10000
+#define DB_VF_OFFSET                   0x4000
+
 #define BNXT_RSS_TBL_SIZE_P5           512U
 #define BNXT_RSS_ENTRIES_PER_CTX_P5    64
 #define BNXT_MAX_RSS_CTXTS_P5 \
@@ -601,6 +611,7 @@ struct bnxt {
        struct rte_eth_dev              *eth_dev;
        struct rte_pci_device           *pdev;
        void                            *doorbell_base;
+       int                             legacy_db_size;
 
        uint32_t                flags;
 #define BNXT_FLAG_REGISTERED           BIT(0)
@@ -632,6 +643,9 @@ struct bnxt {
 #define BNXT_FLAG_DFLT_MAC_SET                 BIT(26)
 #define BNXT_FLAG_TRUFLOW_EN                   BIT(27)
 #define BNXT_FLAG_GFID_ENABLE                  BIT(28)
+#define BNXT_FLAG_RFS_NEEDS_VNIC               BIT(29)
+#define BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2 BIT(30)
+#define BNXT_RFS_NEEDS_VNIC(bp)        ((bp)->flags & BNXT_FLAG_RFS_NEEDS_VNIC)
 #define BNXT_PF(bp)            (!((bp)->flags & BNXT_FLAG_VF))
 #define BNXT_VF(bp)            ((bp)->flags & BNXT_FLAG_VF)
 #define BNXT_NPAR(bp)          ((bp)->flags & BNXT_FLAG_NPAR_PF)
@@ -649,6 +663,10 @@ struct bnxt {
 #define BNXT_TRUFLOW_EN(bp)    ((bp)->flags & BNXT_FLAG_TRUFLOW_EN)
 #define BNXT_GFID_ENABLED(bp)  ((bp)->flags & BNXT_FLAG_GFID_ENABLE)
 
+       uint16_t                chip_num;
+#define CHIP_NUM_58818         0xd818
+#define BNXT_CHIP_SR2(bp)      ((bp)->chip_num == CHIP_NUM_58818)
+
        uint32_t                fw_cap;
 #define BNXT_FW_CAP_HOT_RESET          BIT(0)
 #define BNXT_FW_CAP_IF_CHANGE          BIT(1)
@@ -664,6 +682,7 @@ struct bnxt {
        uint32_t                vnic_cap_flags;
 #define BNXT_VNIC_CAP_COS_CLASSIFY     BIT(0)
 #define BNXT_VNIC_CAP_OUTER_RSS                BIT(1)
+#define BNXT_VNIC_CAP_RX_CMPL_V2       BIT(2)
        unsigned int            rx_nr_rings;
        unsigned int            rx_cp_nr_rings;
        unsigned int            rx_num_qs_per_vnic;
@@ -719,6 +738,11 @@ struct bnxt {
         * health_check_lock
         */
        pthread_mutex_t                 health_check_lock;
+       /* synchronize between dev_stop/dev_close_op and
+        * error recovery thread triggered as part of
+        * HWRM_ASYNC_EVENT_CMPL_EVENT_ID_RESET_NOTIFY
+        */
+       pthread_mutex_t                 err_recovery_lock;
        uint16_t                        max_req_len;
        uint16_t                        max_resp_len;
        uint16_t                        hwrm_max_ext_req_len;