net/sfc: add pattern parsing stub to MAE backend

[dpdk.git] / drivers / net / bnxt / bnxt_ethdev.c

diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index 64c67e7..f1350d3 100644 (file)
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -13,6 +13,7 @@
 #include <rte_cycles.h>
 #include <rte_alarm.h>
 #include <rte_kvargs.h>
+#include <rte_vect.h>
 
 #include "bnxt.h"
 #include "bnxt_filter.h"
@@ -30,6 +31,7 @@
 #include "bnxt_nvm_defs.h"
 #include "bnxt_tf_common.h"
 #include "ulp_flow_db.h"
+#include "rte_pmd_bnxt.h"
 
 #define DRV_MODULE_NAME                "bnxt"
 static const char bnxt_version[] =
@@ -162,6 +164,8 @@ static const char *const bnxt_dev_args[] = {
  */
 #define BNXT_DEVARG_REP_FC_F2R_INVALID(rep_fc_f2r)     ((rep_fc_f2r) > 1)
 
+int bnxt_cfa_code_dynfield_offset = -1;
+
 /*
  * max_num_kflows must be >= 32
  * and must be a power-of-2 supported value
@@ -1169,7 +1173,8 @@ bnxt_receive_function(struct rte_eth_dev *eth_dev)
                DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
                DEV_RX_OFFLOAD_RSS_HASH |
                DEV_RX_OFFLOAD_VLAN_FILTER)) &&
-           !BNXT_TRUFLOW_EN(bp) && BNXT_NUM_ASYNC_CPR(bp)) {
+           !BNXT_TRUFLOW_EN(bp) && BNXT_NUM_ASYNC_CPR(bp) &&
+           rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
                PMD_DRV_LOG(INFO, "Using vector mode receive for port %d\n",
                            eth_dev->data->port_id);
                bp->flags |= BNXT_FLAG_RX_VECTOR_PKT_MODE;
@@ -1202,7 +1207,8 @@ bnxt_transmit_function(__rte_unused struct rte_eth_dev *eth_dev)
         */
        if (!eth_dev->data->scattered_rx &&
            !(offloads & ~DEV_TX_OFFLOAD_MBUF_FAST_FREE) &&
-           !BNXT_TRUFLOW_EN(bp)) {
+           !BNXT_TRUFLOW_EN(bp) &&
+           rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) {
                PMD_DRV_LOG(INFO, "Using vector mode transmit for port %d\n",
                            eth_dev->data->port_id);
                return bnxt_xmit_pkts_vec;
@@ -1252,7 +1258,7 @@ static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 
        if (bp->rx_cp_nr_rings > RTE_ETHDEV_QUEUE_STAT_CNTRS) {
                PMD_DRV_LOG(ERR,
-                       "RxQ cnt %d > CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
+                       "RxQ cnt %d > RTE_ETHDEV_QUEUE_STAT_CNTRS %d\n",
                        bp->rx_cp_nr_rings, RTE_ETHDEV_QUEUE_STAT_CNTRS);
        }
 
@@ -1345,12 +1351,13 @@ static void bnxt_free_switch_domain(struct bnxt *bp)
 }
 
 /* Unload the driver, release resources */
-static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
+static int bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 {
        struct bnxt *bp = eth_dev->data->dev_private;
        struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
        struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
        struct rte_eth_link link;
+       int ret;
 
        eth_dev->data->dev_started = 0;
        eth_dev->data->scattered_rx = 0;
@@ -1365,7 +1372,9 @@ static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
        rte_intr_disable(intr_handle);
 
        /* Stop the child representors for this device */
-       bnxt_rep_stop_all(bp);
+       ret = bnxt_rep_stop_all(bp);
+       if (ret != 0)
+               return ret;
 
        /* delete the bnxt ULP port details */
        bnxt_ulp_port_deinit(bp);
@@ -1406,11 +1415,14 @@ static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
        /* All filters are deleted on a port stop. */
        if (BNXT_FLOW_XSTATS_EN(bp))
                bp->flow_stat->flow_count = 0;
+
+       return 0;
 }
 
 static int bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 {
        struct bnxt *bp = eth_dev->data->dev_private;
+       int ret = 0;
 
        if (rte_eal_process_type() != RTE_PROC_PRIMARY)
                return 0;
@@ -1421,7 +1433,7 @@ static int bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
        bnxt_cancel_fc_thread(bp);
 
        if (eth_dev->data->dev_started)
-               bnxt_dev_stop_op(eth_dev);
+               ret = bnxt_dev_stop_op(eth_dev);
 
        bnxt_free_switch_domain(bp);
 
@@ -1443,7 +1455,7 @@ static int bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
        rte_free(bp->grp_info);
        bp->grp_info = NULL;
 
-       return 0;
+       return ret;
 }
 
 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
@@ -5991,6 +6003,7 @@ bnxt_dev_init(struct rte_eth_dev *eth_dev, void *params __rte_unused)
                return 0;
 
        rte_eth_copy_pci_info(eth_dev, pci_dev);
+       eth_dev->data->dev_flags |= RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
 
        bp = eth_dev->data->dev_private;
 
@@ -6011,6 +6024,22 @@ bnxt_dev_init(struct rte_eth_dev *eth_dev, void *params __rte_unused)
            pci_dev->id.device_id == BROADCOM_DEV_ID_58802_VF)
                bp->flags |= BNXT_FLAG_STINGRAY;
 
+       if (BNXT_TRUFLOW_EN(bp)) {
+               /* extra mbuf field is required to store CFA code from mark */
+               static const struct rte_mbuf_dynfield bnxt_cfa_code_dynfield_desc = {
+                       .name = RTE_PMD_BNXT_CFA_CODE_DYNFIELD_NAME,
+                       .size = sizeof(bnxt_cfa_code_dynfield_t),
+                       .align = __alignof__(bnxt_cfa_code_dynfield_t),
+               };
+               bnxt_cfa_code_dynfield_offset =
+                       rte_mbuf_dynfield_register(&bnxt_cfa_code_dynfield_desc);
+               if (bnxt_cfa_code_dynfield_offset < 0) {
+                       PMD_DRV_LOG(ERR,
+                           "Failed to register mbuf field for TruFlow mark\n");
+                       return -rte_errno;
+               }
+       }
+
        rc = bnxt_init_board(eth_dev);
        if (rc) {
                PMD_DRV_LOG(ERR,