crypto/aesni_gcm: support in-place chained mbufs

[dpdk.git] / drivers / net / bnxt / bnxt_filter.h

diff --git a/drivers/net/bnxt/bnxt_filter.h b/drivers/net/bnxt/bnxt_filter.h
index a1ecfb1..e09b435 100644 (file)
--- a/drivers/net/bnxt/bnxt_filter.h
+++ b/drivers/net/bnxt/bnxt_filter.h
@@ -9,9 +9,19 @@
 #include <rte_ether.h>
 
 struct bnxt;
+
+#define BNXT_FLOW_L2_VALID_FLAG                        BIT(0)
+#define BNXT_FLOW_L2_SRC_VALID_FLAG            BIT(1)
+#define BNXT_FLOW_L2_INNER_SRC_VALID_FLAG      BIT(2)
+#define BNXT_FLOW_L2_DST_VALID_FLAG            BIT(3)
+#define BNXT_FLOW_L2_INNER_DST_VALID_FLAG      BIT(4)
+#define BNXT_FLOW_L2_DROP_FLAG                 BIT(5)
+#define BNXT_FLOW_PARSE_INNER_FLAG             BIT(6)
+
 struct bnxt_filter_info {
        STAILQ_ENTRY(bnxt_filter_info)  next;
        uint64_t                fw_l2_filter_id;
+       struct bnxt_filter_info *matching_l2_fltr_ptr;
        uint64_t                fw_em_filter_id;
        uint64_t                fw_ntuple_filter_id;
 #define INVALID_MAC_INDEX      ((uint16_t)-1)
@@ -19,20 +29,23 @@ struct bnxt_filter_info {
 #define HWRM_CFA_L2_FILTER     0
 #define HWRM_CFA_EM_FILTER     1
 #define HWRM_CFA_NTUPLE_FILTER 2
-       uint8_t                 filter_type;    //L2 or EM or NTUPLE filter
+#define HWRM_CFA_TUNNEL_REDIRECT_FILTER        3
+       uint8_t                 filter_type;
        uint32_t                dst_id;
 
        /* Filter Characteristics */
        uint32_t                flags;
        uint32_t                enables;
-       uint8_t                 l2_addr[ETHER_ADDR_LEN];
-       uint8_t                 l2_addr_mask[ETHER_ADDR_LEN];
+       uint32_t                l2_ref_cnt;
+       uint8_t                 l2_addr[RTE_ETHER_ADDR_LEN];
+       uint8_t                 l2_addr_mask[RTE_ETHER_ADDR_LEN];
+       uint32_t                valid_flags;
        uint16_t                l2_ovlan;
        uint16_t                l2_ovlan_mask;
        uint16_t                l2_ivlan;
        uint16_t                l2_ivlan_mask;
-       uint8_t                 t_l2_addr[ETHER_ADDR_LEN];
-       uint8_t                 t_l2_addr_mask[ETHER_ADDR_LEN];
+       uint8_t                 t_l2_addr[RTE_ETHER_ADDR_LEN];
+       uint8_t                 t_l2_addr_mask[RTE_ETHER_ADDR_LEN];
        uint16_t                t_l2_ovlan;
        uint16_t                t_l2_ovlan_mask;
        uint16_t                t_l2_ivlan;
@@ -57,6 +70,8 @@ struct bnxt_filter_info {
        uint16_t                ip_protocol;
        uint16_t                ip_addr_type;
        uint16_t                ethertype;
+       uint32_t                priority;
+       uint8_t                 dflt;
 };
 
 struct bnxt_filter_info *bnxt_alloc_filter(struct bnxt *bp);
@@ -120,6 +135,8 @@ struct bnxt_filter_info *bnxt_get_l2_filter(struct bnxt *bp,
        HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN
 #define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE  \
        HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE
+#define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE  \
+       HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE
 #define L2_FILTER_ALLOC_INPUT_EN_L2_ADDR_MASK  \
        HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK
 #define NTUPLE_FLTR_ALLOC_INPUT_IP_PROTOCOL_UDP        \
@@ -134,4 +151,8 @@ struct bnxt_filter_info *bnxt_get_l2_filter(struct bnxt *bp,
        HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID
 #define NTUPLE_FLTR_ALLOC_INPUT_EN_MIRROR_VNIC_ID      \
        HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID
+#define L2_FILTER_ALLOC_INPUT_EN_T_NUM_VLANS \
+       HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_NUM_VLANS
+#define L2_FILTER_ALLOC_INPUT_EN_NUM_VLANS \
+       HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_NUM_VLANS
 #endif