net/hns3: encapsulate DFX stats in datapath

[dpdk.git] / drivers / net / bnxt / bnxt_hwrm.c

diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 36c229d..cb8baa8 100644 (file)
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2014-2018 Broadcom
+ * Copyright(c) 2014-2021 Broadcom
  * All rights reserved.
  */
 
@@ -64,6 +64,9 @@ static void bnxt_hwrm_set_pg_attr(struct bnxt_ring_mem_info *rmem,
                                  uint8_t *pg_attr,
                                  uint64_t *pg_dir)
 {
+       if (rmem->nr_pages == 0)
+               return;
+
        if (rmem->nr_pages > 1) {
                *pg_attr = 1;
                *pg_dir = rte_cpu_to_le_64(rmem->pg_tbl_map);
@@ -860,6 +863,9 @@ int bnxt_hwrm_vnic_qcaps(struct bnxt *bp)
        if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_OUTERMOST_RSS_CAP)
                bp->vnic_cap_flags |= BNXT_VNIC_CAP_OUTER_RSS;
 
+       if (flags & HWRM_VNIC_QCAPS_OUTPUT_FLAGS_RX_CMPL_V2_CAP)
+               bp->vnic_cap_flags |= BNXT_VNIC_CAP_RX_CMPL_V2;
+
        bp->max_tpa_v2 = rte_le_to_cpu_16(resp->max_aggs_supported);
 
        HWRM_UNLOCK();
@@ -1096,10 +1102,11 @@ int bnxt_hwrm_ver_get(struct bnxt *bp, uint32_t timeout)
        else
                HWRM_CHECK_RESULT();
 
-       PMD_DRV_LOG(INFO, "%d.%d.%d:%d.%d.%d\n",
+       PMD_DRV_LOG(INFO, "%d.%d.%d:%d.%d.%d.%d\n",
                resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b,
                resp->hwrm_intf_upd_8b, resp->hwrm_fw_maj_8b,
-               resp->hwrm_fw_min_8b, resp->hwrm_fw_bld_8b);
+               resp->hwrm_fw_min_8b, resp->hwrm_fw_bld_8b,
+               resp->hwrm_fw_rsvd_8b);
        bp->fw_ver = (resp->hwrm_fw_maj_8b << 24) |
                     (resp->hwrm_fw_min_8b << 16) |
                     (resp->hwrm_fw_bld_8b << 8) |
@@ -1961,6 +1968,11 @@ int bnxt_hwrm_vnic_cfg(struct bnxt *bp, struct bnxt_vnic_info *vnic)
                        rte_cpu_to_le_16(cpr->cp_ring_struct->fw_ring_id);
                enables = HWRM_VNIC_CFG_INPUT_ENABLES_DEFAULT_RX_RING_ID |
                          HWRM_VNIC_CFG_INPUT_ENABLES_DEFAULT_CMPL_RING_ID;
+               if (bp->vnic_cap_flags & BNXT_VNIC_CAP_RX_CMPL_V2) {
+                       enables |= HWRM_VNIC_CFG_INPUT_ENABLES_RX_CSUM_V2_MODE;
+                       req.rx_csum_v2_mode =
+                               HWRM_VNIC_CFG_INPUT_RX_CSUM_V2_MODE_ALL_OK;
+               }
                goto config_mru;
        }
 
@@ -5826,3 +5838,35 @@ int bnxt_hwrm_cfa_pair_free(struct bnxt *bp, struct bnxt_representor *rep_bp)
                    rep_bp->vf_id);
        return rc;
 }
+
+int bnxt_hwrm_cfa_adv_flow_mgmt_qcaps(struct bnxt *bp)
+{
+       struct hwrm_cfa_adv_flow_mgnt_qcaps_output *resp =
+                                       bp->hwrm_cmd_resp_addr;
+       struct hwrm_cfa_adv_flow_mgnt_qcaps_input req = {0};
+       uint32_t flags = 0;
+       int rc = 0;
+
+       if (!(bp->fw_cap & BNXT_FW_CAP_ADV_FLOW_MGMT))
+               return 0;
+
+       if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) {
+               PMD_DRV_LOG(DEBUG,
+                           "Not a PF or trusted VF. Command not supported\n");
+               return 0;
+       }
+
+       HWRM_PREP(&req, HWRM_CFA_ADV_FLOW_MGNT_QCAPS, BNXT_USE_CHIMP_MB);
+       rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
+
+       HWRM_CHECK_RESULT();
+       flags = rte_le_to_cpu_32(resp->flags);
+       HWRM_UNLOCK();
+
+       if (flags & HWRM_CFA_ADV_FLOW_MGNT_QCAPS_RFS_RING_TBL_IDX_V2_SUPPORTED)
+               bp->flags |= BNXT_FLAG_FLOW_CFA_RFS_RING_TBL_IDX_V2;
+       else
+               bp->flags |= BNXT_FLAG_RFS_NEEDS_VNIC;
+
+       return rc;
+}