net/mlx5: rearrange creation of WQ and CQ object

[dpdk.git] / drivers / net / bnxt / bnxt_ring.c

diff --git a/drivers/net/bnxt/bnxt_ring.c b/drivers/net/bnxt/bnxt_ring.c
index 1999cd7..8f2296b 100644 (file)
--- a/drivers/net/bnxt/bnxt_ring.c
+++ b/drivers/net/bnxt/bnxt_ring.c
@@ -196,7 +196,7 @@ int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
        total_alloc_len += tpa_info_len;
 
        snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
-                "bnxt_%04x:%02x:%02x:%02x-%04x_%s", pdev->addr.domain,
+                "bnxt_" PCI_PRI_FMT "-%04x_%s", pdev->addr.domain,
                 pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
                 suffix);
        mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
@@ -451,6 +451,7 @@ int bnxt_alloc_rxtx_nq_ring(struct bnxt *bp)
        ring->ring_mask = ring->ring_size - 1;
        ring->vmem_size = 0;
        ring->vmem = NULL;
+       ring->fw_ring_id = INVALID_HW_RING_ID;
 
        nqr->cp_ring_struct = ring;
        rc = bnxt_alloc_rings(bp, 0, NULL, NULL, nqr, NULL, "l2_nqr");
@@ -608,7 +609,7 @@ int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index)
                bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
        }
        rxq->index = queue_index;
-#ifdef RTE_ARCH_X86
+#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
        bnxt_rxq_vec_setup(rxq);
 #endif
 
@@ -713,7 +714,7 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp)
                bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
                bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
                rxq->index = i;
-#ifdef RTE_ARCH_X86
+#if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64)
                bnxt_rxq_vec_setup(rxq);
 #endif
        }