net/bnxt: implement SSE vector mode
[dpdk.git] / drivers / net / bnxt / bnxt_rxr.h
index f8d6dc8..d10cefb 100644 (file)
@@ -1,41 +1,13 @@
-/*-
- *   BSD LICENSE
- *
- *   Copyright(c) Broadcom Limited.
- *   All rights reserved.
- *
- *   Redistribution and use in source and binary forms, with or without
- *   modification, are permitted provided that the following conditions
- *   are met:
- *
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in
- *       the documentation and/or other materials provided with the
- *       distribution.
- *     * Neither the name of Broadcom Corporation nor the names of its
- *       contributors may be used to endorse or promote products derived
- *       from this software without specific prior written permission.
- *
- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2014-2018 Broadcom
+ * All rights reserved.
  */
 
 #ifndef _BNXT_RXR_H_
 #define _BNXT_RXR_H_
 
 #define B_RX_DB(db, prod)                                              \
-               (*(uint32_t *)db = (DB_KEY_RX | prod))
+               (*(uint32_t *)db = (DB_KEY_RX | (prod)))
 
 #define BNXT_TPA_L4_SIZE(x)    \
        { \
 #define BNXT_TPA_OUTER_L3_OFF(hdr_info)        \
        ((hdr_info) & 0x1ff)
 
+#define RX_CMP_L4_CS_BITS      \
+       rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_L4_CS_CALC | \
+                        RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC)
+
+#define RX_CMP_L4_CS_ERR_BITS  \
+       rte_cpu_to_le_32(RX_PKT_CMPL_ERRORS_L4_CS_ERROR | \
+                        RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR)
+
+#define RX_CMP_L4_CS_OK(rxcmp1)                                                \
+           (((rxcmp1)->flags2 & RX_CMP_L4_CS_BITS) &&          \
+            !((rxcmp1)->errors_v2 & RX_CMP_L4_CS_ERR_BITS))
+
+#define RX_CMP_L4_CS_UNKNOWN(rxcmp1)                                   \
+           !((rxcmp1)->flags2 & RX_CMP_L4_CS_BITS)
+
+#define RX_CMP_IP_CS_ERR_BITS  \
+       rte_cpu_to_le_32(RX_PKT_CMPL_ERRORS_IP_CS_ERROR | \
+                        RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR)
+
+#define RX_CMP_IP_CS_BITS      \
+       rte_cpu_to_le_32(RX_PKT_CMPL_FLAGS2_IP_CS_CALC | \
+                        RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC)
+
+#define RX_CMP_IP_CS_OK(rxcmp1)                                                \
+               (((rxcmp1)->flags2 & RX_CMP_IP_CS_BITS) &&      \
+               !((rxcmp1)->errors_v2 & RX_CMP_IP_CS_ERR_BITS))
+
+#define RX_CMP_IP_CS_UNKNOWN(rxcmp1)                                   \
+               !((rxcmp1)->flags2 & RX_CMP_IP_CS_BITS)
+
+#define BNXT_RX_POST_THRESH    32
+
 enum pkt_hash_types {
        PKT_HASH_TYPE_NONE,     /* Undefined type */
        PKT_HASH_TYPE_L2,       /* Input: src_MAC, dest_MAC */
@@ -85,8 +89,8 @@ struct bnxt_rx_ring_info {
        struct bnxt_sw_rx_bd    *rx_buf_ring; /* sw ring */
        struct bnxt_sw_rx_bd    *ag_buf_ring; /* sw ring */
 
-       phys_addr_t             rx_desc_mapping;
-       phys_addr_t             ag_desc_mapping;
+       rte_iova_t              rx_desc_mapping;
+       rte_iova_t              ag_desc_mapping;
 
        struct bnxt_ring        *rx_ring_struct;
        struct bnxt_ring        *ag_ring_struct;
@@ -104,5 +108,13 @@ uint16_t bnxt_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 void bnxt_free_rx_rings(struct bnxt *bp);
 int bnxt_init_rx_ring_struct(struct bnxt_rx_queue *rxq, unsigned int socket_id);
 int bnxt_init_one_rx_ring(struct bnxt_rx_queue *rxq);
+int bnxt_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+int bnxt_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+
+#ifdef RTE_ARCH_X86
+uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
+                           uint16_t nb_pkts);
+int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);
+#endif
 
 #endif