net/mlx5: fix E-Switch egress mirror flow validation

[dpdk.git] / drivers / net / bnxt / bnxt_txq.h

diff --git a/drivers/net/bnxt/bnxt_txq.h b/drivers/net/bnxt/bnxt_txq.h
index 720ca90..e0e142d 100644 (file)
--- a/drivers/net/bnxt/bnxt_txq.h
+++ b/drivers/net/bnxt/bnxt_txq.h
@@ -1,38 +1,38 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2014-2018 Broadcom
+ * Copyright(c) 2014-2021 Broadcom
  * All rights reserved.
  */
 
 #ifndef _BNXT_TXQ_H_
 #define _BNXT_TXQ_H_
 
+/* Maximum transmit burst for vector mode.  */
+#define RTE_BNXT_MAX_TX_BURST          64U
+
 struct bnxt_tx_ring_info;
 struct bnxt_cp_ring_info;
 struct bnxt_tx_queue {
        uint16_t                nb_tx_desc;    /* number of TX descriptors */
        uint16_t                tx_free_thresh;/* minimum TX before freeing */
-       /** Index to last TX descriptor to have been cleaned. */
-       uint16_t                last_desc_cleaned;
-       /** Total number of TX descriptors ready to be allocated. */
-       uint16_t                tx_next_dd; /* next desc to scan for DD bit */
-       uint16_t                tx_next_rs; /* next desc to set RS bit */
        uint16_t                queue_id; /* TX queue index */
-       uint16_t                reg_idx; /* TX queue register index */
        uint16_t                port_id; /* Device port identifier */
        uint8_t                 pthresh; /* Prefetch threshold register */
        uint8_t                 hthresh; /* Host threshold register */
        uint8_t                 wthresh; /* Write-back threshold reg */
-       uint32_t                ctx_curr; /* Hardware context states */
        uint8_t                 tx_deferred_start; /* not in global dev start */
+       uint8_t                 tx_started; /* TX queue is started */
 
        struct bnxt             *bp;
        int                     index;
        int                     tx_wake_thresh;
+       uint32_t                vfr_tx_cfa_action;
        struct bnxt_tx_ring_info        *tx_ring;
 
        unsigned int            cp_nr_rings;
        struct bnxt_cp_ring_info        *cp_ring;
        const struct rte_memzone *mz;
+       struct rte_mbuf **free;
+       uint64_t offloads;
 };
 
 void bnxt_free_txq_stats(struct bnxt_tx_queue *txq);